DC & Switching Characteristics
Table 5–42. M-RAM Block Internal Timing Microparameters (Part 2 of 2)
Note (1)
-3 Speed
Grade (2)
-3 Speed
Grade (3)
-4 Speed
Grade
-5 Speed
Grade
Symbol
Parameter
Unit
Min
(4)
Min
(4)
Min
(5)
Min
(4)
Max
Max
Max
Max
tMEGACLKH
tMEGACLR
Minimum clock high
time
1,250
1,312
1,437
1,437
1,675
ps
ps
Minimum clear pulse
width
144
151
165
165
192
Notes to Table 5–42:
(1) FMAX of M-RAM Block obtained using the Quartus II software does not necessarily equal to 1/TMEGARC.
(2) These numbers apply to -3 speed grade EP2S15, EP2S30, EP2S60, and EP2S90 devices.
(3) These numbers apply to -3 speed grade EP2S130 and EP2S180 devices.
(4) For the -3 and -5 speed grades, the minimum timing is for the commercial temperature grade. Only -4 speed grade
devices offer the industrial temperature grade.
(5) For the -4 speed grade, the first number is the minimum timing parameter for industrial devices. The second
number is the minimum timing parameter for commercial devices.
Stratix II Clock Timing Parameters
See Tables 5–43 through 5–67 for Stratix II clock timing parameters.
Table 5–43. Stratix II Clock Timing Parameters
Symbol
Parameter
tCIN
Delay from clock pad to I/O input register
Delay from clock pad to I/O output register
Delay from PLL inclkpad to I/O input register
Delay from PLL inclkpad to I/O output register
tCOUT
tPLLCIN
tPLLCOUT
Altera Corporation
April 2011
5–41
Stratix II Device Handbook, Volume 1
INTEL [ INTEL ]
