Timing Model
Internal Timing Parameters
See Tables 5–37 through 5–42 for internal timing parameters.
Table 5–37. LE_FF Internal Timing Microparameters
-3 Speed
Grade (1)
-3 Speed
Grade (2)
-4 Speed
Grade
-5 Speed
Grade
Symbol
Parameter
Unit
Min
(3)
Min
(3)
Min
(4)
Min
(3)
Max
Max
Max
Max
tSU
LE register setup time before
clock
90
95
104
104
121
ps
ps
ps
ps
ps
ps
ps
ps
ps
tH
LE register hold time after clock 149
157
62
172
172
200
62
tCO
LE register clock-to-output
delay
62
94
99
59
62
109
127
tCLR
tPRE
tCLKL
tCLKH
tLUT
tADDER
Minimum clear pulse width
Minimum preset pulse width
Minimum clock low time
Minimum clock high time
204
204
612
612
162
354
214
214
642
642
162
354
234
234
273
273
820
820
162
354
234
234
703
703
703
703
378
619
397
650
162
170
435
712
507
829
354
372
Notes to Table 5–37:
(1) These numbers apply to -3 speed grade EP2S15, EP2S30, EP2S60, and EP2S90 devices.
(2) These numbers apply to -3 speed grade EP2S130 and EP2S180 devices.
(3) For the -3 and -5 speed grades, the minimum timing is for the commercial temperature grade. Only -4 speed grade
devices offer the industrial temperature grade.
(4) For the -4 speed grade, the first number is the minimum timing parameter for industrial devices. The second
number is the minimum timing parameter for commercial devices.
5–34
Altera Corporation
April 2011
Stratix II Device Handbook, Volume 1
INTEL [ INTEL ]
