80C186EA 80C188EA 80L186EA 80L188EA
80C186EA 80C188EA AND 80L186EA 80L188EA
16-Bit High Integration Embedded Processor
CONTENTS
INTRODUCTION
80C186EA CORE ARCHITECTURE
Bus Interface Unit
Clock Generator
80C186EA PERIPHERAL
ARCHITECTURE
Interrupt Control Unit
Timer Counter Unit
DMA Control Unit
Chip-Select Unit
Refresh Control Unit
Power Management
80C187 Interface (80C186EA Only)
ONCE Test Mode
DIFFERENCES BETWEEN THE
80C186XL AND THE 80C186EA
Pinout Compatibility
Operating Modes
TTL vs CMOS Inputs
Timing Specifications
PACKAGE INFORMATION
Prefix Identification
Pin Descriptions
80C186EA Pinout
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CONTENTS
PACKAGE THERMAL
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Recommended Connections
DC SPECIFICATIONS
I
CC
versus Frequency and Voltage
PDTMR Pin Delay Calculation
AC SPECIFICATIONS
AC Characteristics 80C186EA20 13
AC Characteristics 80L186EA13 8
Relative Timings
AC TEST CONDITIONS
AC TIMING WAVEFORMS
DERATING CURVES
RESET
BUS CYCLE WAVEFORMS
EXECUTION TIMINGS
INSTRUCTION SET SUMMARY
REVISION HISTORY
ERRATA
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INTEL [ INTEL CORPORATION ]
