8XC151SA/SB HIGH-PERFORMANCE CHMOS MICROCONTROLLER
Table 7. Signal Descriptions (Continued)
Signal
Name
Multiplexed
Type
Description
With
V
V
GND
GND
Circuit Ground. Connect this pin to ground.
Ð
SS
Secondary Ground. This ground is provided to reduce ground bounce
and improve power supply bypassing. Connection of this pin to ground
is recommended. However, when using the 8XC151SA/SB as a pin-
SS1
for-pin replacement for the 8XC51BH, V
without loss of compatibility. (Not available on DIP)
can be unconnected
SS1
V
GND
Secondary Ground 2. This ground is provided to reduce ground
bounce and improve power supply bypassing. Connection of this pin to
ground is recommended. However, when using the 8XC151SA/SB as
SS2
a pin-for-pin replacement for the 8XC51FX, V
without loss of compatibility. (Not available on DIP)
can be unconnected
SS2
Ý
WR
O
I
Write. Write signal output to external memory.
P3.6
XTAL1
Input to the On-chip, Inverting, Oscillator Amplifier. To use the
internal oscillator, a crystal/resonator circuit is connected to this pin. If
an external oscillator is used, its output is connected to this pin. XTAL1
is the clock source for internal timing.
XTAL2
O
Output of the On-chip, Inverting, Oscillator Amplifier. To use the
internal oscillator, a crystal/resonator circuit is connected to this pin. If
an external oscillator is used, leave XTAL2 unconnected.
Ð
²
The descriptions of A15:8/P2.7:0 and AD7:0/P0.7:0 are for the nonpage-mode chip configuration (compatible with
44-lead PLCC and 40-pin DIP MCS 51 microcontrollers). If the chip is configured for page-mode operation, port 0 carries
the lower address bits (A7:0), and port 2 carries the upper address bits (A15:8) and the data (D7:0).
11
INTEL [ INTEL ]
