80186/80188
INSTRUCTION SET SUMMARY
80186
Clock
Cycles
80188
Function
Format
Clock
Comments
Cycles
DATA TRANSFER
e
MOV
Move:
Register to Register/Memory
Register/memory to register
Immediate to register/memory
Immediate to register
1 0 0 0 1 0 0 w
1 0 0 0 1 0 1 w
1 1 0 0 0 1 1 w
1 0 1 1 w reg
1 0 1 0 0 0 0 w
1 0 1 0 0 0 1 w
1 0 0 0 1 1 1 0
1 0 0 0 1 1 0 0
mod reg r/m
mod reg r/m
mod 000 r/m
data
2/12
2/9
12/13
3/4
8
2/12*
2/9*
12/13
3/4
e
data
data if w
1
8/16-bit
8/16-bit
e
data if w
1
Memory to accumulator
addr-low
addr-high
addr-high
8*
Accumulator to memory
addr-low
9
9*
Register/memory to segment register
Segment register to register/memory
mod 0 reg r/m
mod 0 reg r/m
2/9
2/11
2/13
2/15
e
PUSH
Push:
Memory
Register
1 1 1 1 1 1 1 1
0 1 0 1 0 reg
0 0 0 reg 1 1 0
0 1 1 0 1 0 s 0
mod 1 1 0 r/m
16
10
9
20
14
13
14
Segment register
Immediate
e
data
data if s
0
10
e
PUSHA
Push All
Pop:
Memory
0 1 1 0 0 0 0 0
36
68
e
POP
1 0 0 0 1 1 1 1
0 1 0 1 1 reg
0 0 0 reg 1 1 1
mod 0 0 0 r/m
(regi01)
20
10
8
24
14
12
Register
Segment register
e
e
POPA
Pop All
0 1 1 0 0 0 0 1
51
83
XCHG
Exchange:
Register/memory with register
Register with accumulator
1 0 0 0 0 1 1 w
1 0 0 1 0 reg
mod reg r/m
4/17
3
4/17*
3
e
IN
Input from:
Fixed port
1 1 1 0 0 1 0 w
1 1 1 0 1 1 0 w
port
port
10
8
10*
8*
Variable port
e
OUT
Output to:
Fixed port
1 1 1 0 0 1 1 w
1 1 1 0 1 1 1 w
1 1 0 1 0 1 1 1
1 0 0 0 1 1 0 1
1 1 0 0 0 1 0 1
1 1 0 0 0 1 0 0
1 0 0 1 1 1 1 1
1 0 0 1 1 1 1 0
1 0 0 1 1 1 0 0
1 0 0 1 1 1 0 1
9
7
9*
7*
15
6
Variable port
e
XLAT
Translate byte to AL
11
6
e
LEA
LDS
LES
Load EA to register
Load pointer to DS
Load pointer to ES
mod reg r/m
mod reg r/m
mod reg r/m
(modi11)
(modi11)
18
18
2
26
26
2
e
e
e
LAHF
SAHF
Load AH with flags
Store AH into flags
e
3
3
e
PUSHF
Push flags
9
13
12
e
POPF
Pop flags
8
Shaded areas indicate instructions not available in 8086, 8088 microsystems.
NOTE:
*Clock cycles shown for byte transfers, for word operations, add 4 clock cycles for each memory transfer.
27
27
INTEL [ INTEL ]
