Debug and Logic Analyzer Mode
Table 5-6.
LAI Local Events (Sheet 2 of 2)
Name
Initialization States
Errors
Events
8
6
Sel
Addr
1:8
30:25
Description
Disable[1], calibrate[2], training[3], testing[4], pollling[5],
config[6], l0[7], l0s or recalibrate[8]
• SB/NB Fail Over mode [25], when unmasked:
• SB CRC error[26],
• Thermal overload[27],
• Clock training violation (< 6 transitions in 512 UI) [28],
• Unimplemented register access[29],
• Other implementation specific errors[30]
For the Intel 6400/6402 Advanced Memory Buffer: event[30]
is the “OR“ of any bit in FERR[7:4] or NERR[7:4]
Qual_Flag
Spare
NOP
Total Events
1
1
1
32
24
31
0
Null Event
For the Intel 6400/6402 Advanced Memory Buffer: There is
enough space for 32 events
Table 5-7.
LAI Event Selection
Name
Output event/triggers
EVBus events
Inject Event NB
Error Injection Trigger
Qual Events
Total Events
Events
11
4
1
1
2
19
Sent to LA on DDR pins
Sent on DDR pins
Assert NB event bit - not necessarily LAI usage
Inject errors - not necessarily LAI usage
Start and stop events for qualification signal
Description
5.1.8.4
Event Bus
The AMB LAI mode enables four events signals (EV[3:0]) to be shared between the
AMB or compatible LAI devices in a system. The signals are shared through a uniquely
defined interconnect that connects all the devices to the 4-bit wide daisy chain bus. The
4 lanes are independent and carry separate events or triggers. Due to the noisy nature
of the interconnect between LAI devices, filtering is required to eliminate spurious
events from being introduced. A typical lane is shown in
below.
Intel® 6400/6402 Advanced Memory Buffer Datasheet
63
INTEL [ INTEL CORPORATION ]
