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631XESB 参数 Datasheet PDF下载

631XESB图片预览
型号: 631XESB
PDF下载: 下载PDF文件 查看货源
内容描述: [Multifunction Peripheral, CMOS, PBGA641, 40 X 40 MM, MICRO, BGA-641]
分类和应用:
文件页数/大小: 106 页 / 3572 K
品牌: INTEL [ INTEL ]
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Electrical Specifications  
2
Electrical Specifications  
This chapter describes the electrical characteristics of the processor interfaces and  
signals. DC electrical characteristics are provided.  
2.1  
Power and Ground Lands  
The Pentium 4 processor has 226 VCC (power), 24 VTT and 273 VSS (ground) inputs  
for on-chip power distribution. All power lands must be connected to VCC, while all VSS  
lands must be connected to a system ground plane. The processor VCC lands must be  
supplied the voltage determined by the Voltage IDentification (VID) lands.  
Twenty-four (24) signals are denoted as VTT, that provide termination for the front side  
bus and power to the I/O buffers. A separate supply must be implemented for these  
lands, that meets the VTT specifications outlined in Table 4.  
2.2  
Decoupling Guidelines  
Due to its large number of transistors and high internal clock speeds, the processor is  
capable of generating large current swings. This may cause voltages on power planes  
to sag below their minimum specified values if bulk decoupling is not adequate. Larger  
bulk storage (CBULK), such as electrolytic or aluminum-polymer capacitors, supply  
current during longer lasting changes in current demand by the component, such as  
coming out of an idle condition. Similarly, they act as a storage well for current when  
entering an idle condition from a running condition. The motherboard must be designed  
to ensure that the voltage provided to the processor remains within the specifications  
listed in Table 4. Failure to do so can result in timing violations or reduced lifetime of  
the component.  
2.2.1  
2.2.2  
V
Decoupling  
CC  
VCC regulator solutions need to provide sufficient decoupling capacitance to satisfy the  
processor voltage specifications. This includes bulk capacitance with low effective series  
resistance (ESR) to keep the voltage rail within specifications during large swings in  
load current. In addition, ceramic decoupling capacitors are required to filter high  
frequency content generated by the front side bus and processor activity. Consult the  
Voltage Regulator-Down (VRD) 10.1 Design Guide For Desktop and Transportable  
LGA775 Socket for further information.  
V Decoupling  
TT  
Decoupling must be provided on the motherboard. Decoupling solutions must be sized  
to meet the expected load. To insure compliance with the specifications, various factors  
associated with the power delivery solution must be considered including regulator  
type, power plane and trace sizing, and component placement. A conservative  
decoupling solution would consist of a combination of low ESR bulk capacitors and high  
frequency ceramic capacitors.  
Datasheet  
13