MCS” 51 CONTROLLER
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PIN DESCRIPTIONS
Vcc: Supply voltage.
Vss: Circuit ground.
Port O:Port O is an 8-bit open drain bidirectional 1/0
port. As an output port each pin can sink 8 LS TTL
inputs.
Port Opins that have 1‘s written to them float, and in
that state can be used as high-impedance inputs.
Port O is also the multiplexed low-order address and
data bus during accesses to external Program and
Data Memory. In this application it uses strong inter-
nal pullups when emitting 1‘s and can source and
sink 8 LS TTL inputs.
Port O also receives the code bytes during program-
ming of the EPROM parts, and outputs the code
bytes during program verification of the ROM and
EPROM parts. External pullups are required during
program verification.
Port 1: Port 1 is an 8-bit bidirectional 1/0 port with
internal pullups, The Port 1 output buffers can sink/
source 4 LS TTL inputs. Port 1 pins that have 1‘s
written to them are pulled high by the internal pull-
UPS,and in that state can be used as inputs. As
inputs, Port 1 pins that are externally pulled low will
source current (IIL on the data sheet) because of the
internal pullups.
Port 1 also receives the low-order address bytes
during programming of the EPROM parts and during
program verification of the ROM and EPROM parts.
In the 8032AH, 8052AH and 8752BH, Port 1 pins
P1.O and P1.1 also serve the T2 and T2EX func-
tions, respectively.
Port 2 emits the high-order address byte during
fetches from external Program Memory and during
accesses to external Data Memory that use 16-bit
addresses (MOVX @DPTR). In this application it
uses strong internal pullups when emitting 1‘s. Dur-
ing accesses to external Data Memory that use 8-bit
addresses (MOVX @Ri),Port 2 emits the contents of
the P2 Special Function Register.
Port 2 also receives the high-order address bits dur-
ing programming of the EPROM parts and during
program verification of the ROM and EPROM parts.
The protection feature of the 8051AHP causes bits
P2.4 through P2.7 to be forced to O,effectively limit-
ing external Data and Code space to 4K each during
external accesses.
Port 3: Port 3 is an 8-bit bidirectional l/O port with
internal pullups. The Port 3 output buffers can sink/
source 4 LS TTL inputs. Port 3 pins that have 1‘s
written to them are pulled high by the internal pull-
UPS,and in that state can be used as inputs. As
inputs, Port 3 pins that are externally pulled low will
source current (IIL on the data sheet) because of the
pullups.
Port 3 also serves the functions of various special
features of the MCS 51 Family, as listed below:
Port
Pin
P3,0
P3.1
P3.2
P3,3
P3.4
P3.5
P3.6
P3.7
Alternative Function
RXD (serial input port)
TXD (serial output port)
INTO(external interrupt O)
INT1 (external interrupt 1)
TO(Timer Oexternal input)
T1 (Timer 1 external input)
WR (external data memory write strobe)
~ (external data memory read strobe)
I
Port
Pin
P1
.0
P1.1
I
Alternative Function
T2 (Timer/Counter 2 External Input)
T2EX (Timer/Counter 2
Capture/Reload Trigger)
I
RST: Reset input. A high on this pin for two machine
cycles while the oscillator is running resets the de-
vice,
ALE/PROG: Address Latch Enable output pulse for
latching the low byte of the address during accesses
to external memory. This pin is also the program
pulse input (PROG) during programming of the
EPROM parts.
In normal operation ALE is emitted at a constant
rate of 1/6the oscillator frequency, and may be used
for external timing or clocking purposes. Note, how-
ever, that one ALE pulse is skipped during each ac-
cess to external Data Memory.
Port 2: Port 2 is an 8-bit bidirectional l/O port with
internal pullups. The Port 2 output buffers can sink/
source 4 LS TTL inputs. Porl 2 pins that have 1‘s
written to them are pulled high by the internal pull-
UPS,and in that state can be used as inputs. As
inputs, Port 2 pins that are externally pulled low will
source current (IIL on the data sheet) because of the
internal pullups.
INTEL [ INTEL CORPORATION ]
