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5SGSMD5K2F40C3N 参数 Datasheet PDF下载

5SGSMD5K2F40C3N图片预览
型号: 5SGSMD5K2F40C3N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 462 CLBs, 457000-Cell, CMOS, PBGA1517, ROHS COMPLIANT, FBGA-1517]
分类和应用: 可编程逻辑
文件页数/大小: 72 页 / 1228 K
品牌: INTEL [ INTEL CORPORATION ]
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Electrical Characteristics
Page 3
Table 3. Absolute Maximum Ratings for Stratix V Devices (Part 2 of 2)
Symbol
V
CCD_FPLL
V
CCA_FPLL
V
I
T
J
T
STG
PLL digital power supply
PLL analog power supply
DC input voltage
Operating junction temperature
Storage temperature (No bias)
Description
Minimum
–0.5
–0.5
–0.5
–55
–65
Maximum
1.8
3.4
3.8
125
150
Unit
V
V
V
°C
°C
Table 4
lists the absolute conditions for the transceiver power supply for Stratix V GX,
GS, and GT devices.
Table 4. Transceiver Power Supply Absolute Conditions for Stratix V GX, GS, and GT Devices
Symbol
V
CCA_GXBL
V
CCA_GXBR
V
CCA_GTBR
V
CCHIP_L
V
CCHIP_R
V
CCHSSI_L
V
CCHSSI_R
V
CCR_GXBL
V
CCR_GXBR
V
CCR_GTBR
V
CCT_GXBL
V
CCT_GXBR
V
CCT_GTBR
V
CCL_GTBR
V
CCH_GXBL
V
CCH_GXBR
Description
Transceiver channel PLL power supply (left side)
Transceiver channel PLL power supply (right side)
Transceiver channel PLL power supply (right side)
Transceiver hard IP power supply (left side)
Transceiver hard IP power supply (right side)
Transceiver PCS power supply (left side)
Transceiver PCS power supply (right side)
Receiver analog power supply (left side)
Receiver analog power supply (right side)
Receiver analog power supply for GT channels (right side)
Transmitter analog power supply (left side)
Transmitter analog power supply (right side)
Transmitter analog power supply for GT channels (right side)
Transmitter clock network power supply (right side)
Transmitter output buffer power supply (left side)
Transmitter output buffer power supply (right side)
Devices
GX, GS, GT
GX, GS
GT
GX, GS, GT
GX, GS, GT
GX, GS, GT
GX, GS, GT
GX, GS, GT
GX, GS, GT
GT
GX, GS, GT
GX, GS, GT
GT
GT
GX, GS, GT
GX, GS, GT
Minimum
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
Maximum
3.75
3.75
3.75
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.8
1.8
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Maximum Allowed Overshoot and Undershoot Voltage
During transitions, input signals may overshoot to the voltage shown in
Table 5
and
undershoot to –2.0 V for input currents less than 100 mA and periods shorter than
20 ns.
December 2015
Altera Corporation
Stratix V Device Datasheet