Electrical Characteristics
Page 13
Internal Weak Pull-Up Resistor
Table 16 lists the weak pull-up resistor values for Stratix V devices.
Table 16. Internal Weak Pull-Up Resistor for Stratix V Devices (1), (2)
V
CCIO Conditions
(V) (3)
Symbol
Description
Value (4) Unit
3.0 5%
2.5 5%
1.8 5%
1.5 5%
1.35 5%
1.25 5%
1.2 5%
25
25
25
25
25
25
25
k
k
k
k
k
k
k
Value of the I/O pin pull-up resistor before
and during configuration, as well as user
mode if you enable the programmable
pull-up resistor option.
RPU
Notes to Table 16:
(1) All I/O pins have an option to enable the weak pull-up resistor except the configuration, test, and JTAG pins.
(2) The internal weak pull-down feature is only available for the JTAG TCKpin. The typical value for this internal weak
pull-down resistor is approximately 25 k
(3) The pin pull-up resistance values may be lower if an external source drives the pin higher than VCCIO
.
(4) These specifications are valid with a 10% tolerance to cover changes over PVT.
I/O Standard Specifications
Table 17 through Table 22 list the input voltage (VIH and VIL), output voltage (VOH and
OL), and current drive characteristics (IOH and IOL) for various I/O standards
V
supported by Stratix V devices. These tables also show the Stratix V device family I/O
standard specifications. The VOL and VOH values are valid at the corresponding IOH
and IOL, respectively.
For an explanation of the terms used in Table 17 through Table 22, refer to “Glossary”
on page 65. For tolerance calculations across all SSTL and HSTL I/O standards, refer
to Altera knowledge base solution rd07262012_486.
Table 17. Single-Ended I/O Standards for Stratix V Devices
VCCIO (V)
VIL (V)
Max
VIH (V)
VOL (V)
VOH (V)
I/O
IOL
IOH
Standard
(mA)
(mA)
Min
2.85
2.85
2.375
Typ
3
Max
3.15
Min
–0.3
–0.3
–0.3
Min
1.7
1.7
1.7
Max
3.6
3.6
3.6
Max
0.4
0.2
0.4
Min
2.4
LVTTL
LVCMOS
2.5 V
0.8
0.8
0.7
2
0.1
1
–2
–0.1
–1
3
3.15
V
CCIO – 0.2
2
2.5
2.625
0.35 *
VCCIO
0.65 * VCCIO
VCCIO 0.3
+
+
+
VCCIO
0.45
–
1.8 V
1.5 V
1.2 V
1.71
1.425
1.14
1.8
1.5
1.2
1.89
1.575
1.26
–0.3
–0.3
–0.3
0.45
2
2
2
–2
–2
–2
0.35 *
VCCIO
0.65 * VCCIO
VCCIO 0.3
0.25 *
VCCIO
0.75 *
VCCIO
0.35 *
VCCIO
0.65 * VCCIO
VCCIO 0.3
0.25 *
VCCIO
0.75 *
VCCIO
December 2015 Altera Corporation
Stratix V Device Datasheet
INTEL [ INTEL ]
