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5M80ZT100C5N 参数 Datasheet PDF下载

5M80ZT100C5N图片预览
型号: 5M80ZT100C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, 64-Cell, CMOS, PQFP100, 16 X 16 MM, 0.50 MM PITCH, LEAD FREE, TQFP-100]
分类和应用: 时钟可编程逻辑
文件页数/大小: 166 页 / 4004 K
品牌: INTEL [ INTEL ]
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7–2  
Chapter 7: User Flash Memory in MAX V Devices  
UFM Array Description  
Memory Organization Map  
Table 7–2 lists the memory organization for the MAX V UFM block. There are 512  
locations with 9 bits addressing a range of 000hto 1FFh. Each location stores 16-bit  
wide data. The MSB of the address register indicates the sector in operation.  
Table 7–2. Memory Organization  
Sector  
Address Range  
1
0
100h  
000h  
1FFh  
0FFh  
Using and Accessing UFM Storage  
You can use the UFM to store data of different memory sizes and data widths. Even  
though the UFM storage width is 16 bits, you can implement different data widths or  
a serial interface with the ALTUFM megafunction. Table 7–3 lists the different data  
widths available for the three types of interfaces supported in the Quartus II software,  
as well as no interface.  
Table 7–3. Data Widths for Logic Array Interfaces  
Logic Array Interfaces  
Data Widths (Bits)  
Interface Types  
Serial  
I2C  
SPI  
8
8 or 16  
Serial  
Parallel  
None  
Options of 3 to 16  
16  
Parallel  
Serial  
For more details about the logic array interface options in the ALTUFM megafunction,  
refer to “Software Support for UFM Block” on page 7–13.  
1
The UFM block is accessible through the logic array interface and the JTAG interface.  
However, the UFM logic array interface does not have access to the configuration  
flash memory (CFM) block.  
MAX V Device Handbook  
January 2011 Altera Corporation