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5M80ZE64I5N 参数 Datasheet PDF下载

5M80ZE64I5N图片预览
型号: 5M80ZE64I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, 64-Cell, CMOS, PQFP64, 9 X 9 MM, 0.40 MM PITCH, LEAD FREE, PLASTIC, EQFP-64]
分类和应用:
文件页数/大小: 166 页 / 4004 K
品牌: INTEL [ INTEL ]
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7–6  
Chapter 7: User Flash Memory in MAX V Devices  
UFM Functional Description  
UFM Data Register  
The UFM data register is 16 bits wide with four control signals: DRSHFT  
, DRCLK, DRDin,  
and DRDout DRSHFTdistinguishes between clock edges that move data serially from  
.
DRDinto DRDoutand clock edges that latch parallel data from the UFM sectors. If the  
DRSHFTsignal is high, a clock edge moves data serially through the registers from  
DRDinto DRDout. If the DRSHFTsignal is low, a clock edge captures data from the UFM  
sector pointed by the address register in parallel. The MSB is the first bit that is seen at  
DRDout. The data register DRSHFTsignal is also used to enable the UFM for reading  
data. When the DRSHFTsignal is low, the UFM latches data into the data register.  
Figure 7–3 shows the UFM data register.  
Figure 7–3. UFM Data Register  
MAX V UFM Block  
Data Register  
16  
16  
DRDin  
DRDout  
DRCLK  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D8  
D9  
D10  
D11  
D12  
D13  
D14  
D15  
MSB  
LSB  
UFM Program/Erase Control Block  
The UFM program/erase control block is used to generate all the control signals  
necessary to program and erase the UFM block independently. This block reduces the  
number of logic elements (LEs) necessary to implement a UFM controller in the logic  
array. It also guarantees correct timing of the control signals to the UFM. A rising edge  
on either PROGRAMor ERASEsignal causes this control signal block to activate and begin  
sequencing through the program or erase cycle. At this point, for a program  
instruction, the data currently in the data register is written to the address pointed to  
by the address register.  
Only sector erase is supported by the UFM. When an ERASEcommand is executed,  
this control block erases the sector whose address is stored in the address register.  
When the PROGRAM or ERASE command first activates the program/erase control  
block, the BUSYsignal will be driven high to indicate an operation in progress in the  
UFM. After the program or erase algorithm is completed, the BUSYsignal is forced  
low.  
MAX V Device Handbook  
January 2011 Altera Corporation  
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