Chapter 7: User Flash Memory in MAX V Devices
7–37
Software Support for UFM Block
ALTUFM Parallel Interface Timing Specification
Figure 7–34 shows the timing specifications for the parallel interface. Table 7–16 lists
the parallel interface instruction signals. The nREAD nWRITE, and nERASEsignals are
,
active low signals.
Figure 7–34. Parallel Interface Timing Waveform
t
COMMAND
Command
t
HNBUSY
nBusy
t
HBUS
Data or Address Bus
Table 7–16. Parallel Interface Timing Parameters
Symbol
Description
Minimum (ns)
Maximum (ns)
The time required for the command signal (nREAD/nWRITE/nERASE)
to be asserted and held low to initiate a read/write/erase sequence
tCOMMAND
600
3,000
Maximum delay between command signal’s falling edge to the
nBUSYsignal’s falling edge
tHNBUSY
—
300
—
The time that the data and address buses must be present at the
data input and address register ports after the command signal has
been asserted low
tHBUS
600
Instantiating Parallel Interface Using Quartus II ALTUFM_PARALLEL
Megafunction
Figure 7–35 shows the ALTUFM_PARALLEL megafunction symbol for a parallel
interface instantiation in the Quartus II software.
Figure 7–35. ALTUFM_PARALLEL Megafunction Symbol for Parallel Interface Instantiation
January 2011 Altera Corporation
MAX V Device Handbook
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