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5CSEMA5U23I7N 参数 Datasheet PDF下载

5CSEMA5U23I7N图片预览
型号: 5CSEMA5U23I7N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 85000-Cell, CMOS, PBGA672, ROHS COMPLIANT, UBGA-672]
分类和应用: 可编程逻辑
文件页数/大小: 66 页 / 1360 K
品牌: INTEL [ INTEL ]
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Electrical Characteristics  
Page 11  
Internal Weak Pull-Up Resistor  
Table 13 lists the weak pull-up resistor values for Cyclone V devices.  
All I/O pins have an option to enable weak pull-up except the configuration, test, and  
JTAG pins. For more information about the pins that support internal weak pull-up  
and internal weak pull-down features, refer to the Cyclone V Device Family Pin  
Connection Guidelines.  
Table 13. Internal Weak Pull-Up Resistor Values for Cyclone V Devices  
Symbol  
Description  
Conditions (V) (1)  
CCIO = 3.3 5%  
Typ (2)  
25  
Unit  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
V
VCCIO = 3.0 5%  
VCCIO = 2.5 5%  
VCCIO = 1.8 5%  
VCCIO = 1.5 5%  
VCCIO = 1.35 5%  
VCCIO = 1.25 5%  
VCCIO = 1.2 5%  
25  
25  
Value of the I/O pin pull-up resistor before and during  
configuration, as well as user mode if you have enabled the  
programmable pull-up resistor option.  
25  
RPU  
25  
25  
25  
25  
Notes to Table 13:  
(1) Pin pull-up resistance values may be lower if an external source drives the pin higher than VCCIO  
.
(2) These specifications are valid with 10% tolerances to cover changes over PVT.  
I/O Standard Specifications  
Table 14 through Table 19 list the input voltage (VIH and VIL), output voltage (VOH and  
VOL), and current drive characteristics (IOH and IOL) for various I/O standards  
supported by Cyclone V devices.  
For an explanation of terms used in Table 14 through Table 19, refer to “Glossary” on  
page 1–59.  
Table 14. Single-Ended I/O Standards for Cyclone V Devices (Part 1 of 2)  
VCCIO (V)  
VIL (V)  
Max  
VIH (V)  
VOL (V)  
Max  
VOH (V)  
Min  
(1)  
(1)  
I/O  
Standard  
IOL  
IOH  
(mA) (mA)  
Min Typ Max Min  
Min  
Max  
3.3-V  
LVTTL  
3.135 3.3 3.465 –0.3  
3.135 3.3 3.465 –0.3  
0.8  
0.8  
0.8  
1.7  
3.6  
0.45  
0.2  
0.4  
0.2  
2.4  
CCIO – 0.2  
2.4  
4
2
2
–4  
–2  
–2  
3.3-V  
LVCMOS  
1.7  
1.7  
3.6  
3.6  
3.6  
V
V
3.0-V  
LVTTL  
2.85  
3
3
3.15 –0.3  
3.15 –0.3  
3.0-V  
LVCMOS  
2.85  
2.85  
0.8  
1.7  
CCIO – 0.2 0.1 –0.1  
3.0-V PCI  
3
3
3.15  
3.15  
0.3 x VCCIO  
0.5 x VCCIO  
VCCIO + 0.3 0.1 x VCCIO 0.9 x VCCIO  
VCCIO + 0.3 0.1 x VCCIO 0.9 x VCCIO  
1.5 –0.5  
1.5 –0.5  
3.0-V PCI-X 2.85  
0.35 x VCCIO 0.5 x VCCIO  
0.7 1.7  
1.71 1.8 1.89 –0.3 0.35 x VCCIO 0.65 x VCCIO VCCIO + 0.3  
2.5 V  
1.8 V  
1.5 V  
2.375 2.5 2.625 –0.3  
3.6  
0.4  
2
1
2
2
–1  
–2  
–2  
0.45  
VCCIO – 0.45  
1.425 1.5 1.575 –0.3 0.35 x VCCIO 0.65 x VCCIO VCCIO + 0.3 0.25 x VCCIO 0.75 x VCCIO  
July 2014 Altera Corporation  
Cyclone V Device Datasheet