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5CEFA7U19I7 参数 Datasheet PDF下载

5CEFA7U19I7图片预览
型号: 5CEFA7U19I7
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 149500-Cell, CMOS, PBGA484, UBGA-484]
分类和应用: 可编程逻辑
文件页数/大小: 95 页 / 1359 K
品牌: INTEL [ INTEL CORPORATION ]
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CV-51002
2015.12.04
Transceiver Power Supply Operating Conditions
7
Symbol
Description
Condition
Minimum
(2)
Typical
Maximum
(2)
Unit
Commercial
T
J
Operating junction temperature
Industrial
Automotive
t
RAMP
(7)
Power supply ramp time
Standard POR
Fast POR
0
–40
–40
200µs
200µs
85
100
125
100ms
4ms
°C
°C
°C
Transceiver Power Supply Operating Conditions
Table 4: Transceiver Power Supply Operating Conditions for Cyclone V GX, GT, SX, and ST Devices
Symbol
Description
Minimum
(8)
Typical
Maximum
(8)
Unit
V
CCH_GXBL
V
CCE_GXBL
(9)(10)
V
CCL_GXBL
(9)(10)
Transceiver high voltage power (left side)
Transmitter and receiver power (left side)
Clock network power (left side)
2.375
1.07/1.17
1.07/1.17
2.5
1.1/1.2
1.1/1.2
2.625
1.13/1.23
1.13/1.23
V
V
V
(2)
(7)
(8)
(9)
(10)
The power supply value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements.
Refer to the PDN tool for the additional budget for the dynamic tolerance requirements.
This is also applicable to HPS power supply. For HPS power supply, refer to t
RAMP
specifications for standard POR when
HPS_PORSEL
= 0 and t
RAMP
specifications for fast POR when
HPS_PORSEL
= 1.
The power supply value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements.
Refer to the PDN tool for the additional budget for the dynamic tolerance requirements.
Altera recommends increasing the V
CCE_GXBL
and V
CCL_GXBL
typical value from 1.1 V to 1.2 V for Cyclone V GT and ST FPGA systems which
require full compliance to the PCIe Gen2 transmit jitter specification. For more information about the maximum full duplex channels recommended
in Cyclone V GT and ST devices under this condition, refer to the Transceiver Protocol Configurations in Cyclone V Devices chapter.
Altera recommends increasing the V
CCE_GXBL
and V
CCL_GXBL
typical value from 1.1 V to 1.2 V for full compliance to CPRI transmit jitter specifica‐
tion at 4.9152 Gbps ( Cyclone V GT and ST devices) and 6.144Gbps ( Cyclone V GT and ST devices only). For more information about the
maximum full duplex channels recommended in Cyclone V GT and ST devices for CPRI 6.144 Gbps, refer to the Transceiver Protocol Configura‐
tions in Cyclone V Devices chapter.
Altera Corporation
Cyclone V Device Datasheet