Electrical Specifications
2.13
GTL+ FSB Specifications
Termination resistors are not required for most GTL+ signals, as these are integrated into the
processor silicon.Valid high and low levels are determined by the input buffers which compare a
signal’s voltage with a reference voltage called GTLREF. Table 2-18 lists the GTLREF
specifications. The GTL+ reference voltage (GTLREF) should be generated on the system board
using high precision voltage divider circuits.
Table 2-18. GTL+ Bus Voltage Definitions
Symbol
Parameter
Min
Typ
Max
Units Notes1
Bus Reference
Voltage
2, 3, 4, 5
GTLREF
(0.98 * 0.67) * VTT 0.67 * VTT (1.02 * 0.67) * VTT
V
On die pullup for
BOOTSELECT
signal
6
RPULLUP
500
—
5000
Ω
Termination
Resistance
7
RTT
54
60
66
61
Ω
8
COMP[1:0]
COMP Resistance
59.8
60.4
Ω
NOTES:
1.
2.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
The tolerances for this specification have been stated generically to enable the system designer to calculate the minimum
and maximum values across the range of V
.
TT
3.
4.
5.
GTLREF should be generated from V by a voltage divider of 1% resistors or 1% matched resistors.
TT
The V referred to in these specifications is the instantaneous V
The Intel 915G/915GV/915P and 910GL Express chipset platforms use a pull-up resistor of 100 Ω and a pull-down resistor
of 210 Ω. Contact your Intel representative for further details and documentation.
These pull-ups are to V .
TT
.
TT
TT
®
6.
7.
8.
RTT is the on-die termination resistance measured at V /2 of the GTL+ output driver.
TT
COMP resistance must be provided on the system board with 1% resistors. COMP[1:0] resistors are to V
.
SS
§
34
Datasheet
INTEL [ INTEL ]
