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520 参数 Datasheet PDF下载

520图片预览
型号: 520
PDF下载: 下载PDF文件 查看货源
内容描述: 奔腾4处理器,支持超线程技术 [Pentium 4 Processors Supporting Hyper-Threading Technology]
分类和应用:
文件页数/大小: 96 页 / 1585 K
品牌: INTEL [ INTEL ]
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Electrical Specifications  
Table 2-11. GTL+ Asynchronous Signal Group DC Specifications  
Symbol  
Parameter  
Min  
Max  
Unit Notes1  
2, 3  
VIL  
VIH  
Input Low Voltage  
Input High Voltage  
Output High Voltage  
0.0  
VTT/2 – (0.10 * VTT  
)
V
3, 4, 5, 6  
VTT/2 + (0.10 * VTT  
0.90*VTT  
)
VTT  
VTT  
V
5, 6, 7  
VOH  
V
VTT/[(0.50*RTT_MIN) +  
8
IOL  
Output Low Current  
A
RON_MIN  
± 200  
± 200  
12  
]
9
ILI  
ILO  
Input Leakage Current  
Output Leakage Current  
Buffer On Resistance  
N/A  
N/A  
8
µA  
10  
µA  
RON  
-
NOTES:  
1.  
2.  
3.  
Unless otherwise noted, all specifications in this table apply to all processor frequencies.  
is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.  
LINT0/INTR and LINT1/NMI use GTLREF as a reference voltage. For these two signals V = GTLREF + (0.10 * V ) and  
V
IL  
IH  
TT  
V = GTLREF – (0.10 * V ).  
IL  
TT  
4.  
5.  
V
V
is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.  
IH  
IH  
and V may experience excursions above V . However, input signal drivers must comply with the signal quality spec-  
OH  
TT  
ifications.  
6.  
7.  
8.  
The V referred to in these specifications refers to instantaneous V  
All outputs are open drain.  
The maximum output current is based on maximum current handling capability of the buffer and is not specified into the test  
load.  
.
TT  
TT  
9.  
Leakage to V with land held at V .  
SS TT  
10. Leakage to V with land held at 300 mV.  
TT  
Table 2-12. GTL+ Signal Group DC Specifications  
Symbol  
Parameter  
Min  
Max  
Unit Notes1  
2, 3  
VIL  
VIH  
Input Low Voltage  
Input High Voltage  
Output High Voltage  
0.0  
GTLREF – (0.10 * VTT  
)
V
3, 4  
GTLREF + (0.10 * VTT  
0.90*VTT  
)
VTT  
VTT  
V
3
VOH  
V
VTT/[(0.50*RTT_MIN) +  
IOL  
Output Low Current  
N/A  
A
-
RON_MIN  
± 200  
± 200  
12  
]
5
-
ILI  
ILO  
Input Leakage Current  
Output Leakage Current  
Buffer On Resistance  
N/A  
N/A  
8
µA  
µA  
RON  
-
NOTES:  
1.  
2.  
3.  
4.  
5.  
Unless otherwise noted, all specifications in this table apply to all processor frequencies.  
is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.  
The V referred to in these specifications is the instantaneous V  
V
IL  
.
TT  
TT  
V
is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.  
IH  
Leakage to V with land held at V  
.
SS  
TT  
Datasheet  
31