Pin Listing and Signal Descriptions
Table 4-2. Numerical Pin Assignment
Table 4-2. Numerical Pin Assignment
Signal Buffer
Signal Buffer
Pin #
Pin Name
VCC
Direction
Pin #
Pin Name
Direction
Type
Type
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AE1
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
TAP
OPTIMIZED/
COMPAT#
AE26
Power/Other
Input
VSS
AF1
VSS
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Bus Clock
VCC
AF2
VCC
VSS
AF3
VCCVIDLB
VCCVID
VCC
Input
Input
VCC
AF4
VSS
AF5
VCC
AF6
VSS
VSS
AF7
VCC
VCC
AF8
VSS
VCCIOPLL
VSS
AF9
VCC
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF23
AF24
AF25
AF26
VSS
VSSA
VSS
VCC
VSS
TESTHI0
TESTHI12
ITP_CLK1
VID4
Input
VCC
Input
VSS
Input
VCC
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Output
Output
Output
Output
Output
VSS
AE2
VID3
VCC
AE3
VID2
VSS
AE4
VID1
VCC
AE5
VID0
VSS
AE6
VCC
VCC
AE7
VSS
BCLK0
BCLK1
RESERVED
RESERVED
SKTOCC#
Input
Input
AE8
VCC
Bus Clock
AE9
VSS
AE10
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
VCC
VSS
Power/Other
Output
VCC
VSS
VCC
VSS
VCC
VSS
VCC
VSS
VCC
RESERVED
VSS
Power/Other
Power/Other
Power/Other
Power/Other
VCCA
VSS
DBR#
Output
Datasheet
53
INTEL [ INTEL ]
