Testability
13.1
XOR Test Mode Initialization
Figure 13-1. XOR Test Mode Initialization Cycles
The above figure shows the wave forms to be able to boot the part into XOR mode.
The straps that need to be controlled during this boot process are BSEL[2:0],
SDVO_CTRLDATA, EXP_EM, EXP_SLR, and XORTEST.
On G35 platforms, all strap values must be driven before PWROK asserts. BSEL0 must
be a 1. BSEL[2:1] need to be defined values, but logic value in any order will do.
XORTEST must be driven to 0.
If sDVO is present in the design, SDVO_CTRLDATA must be pulled to logic 1.
Depending on if Static Lane Reversal is used and if the sDVO/PCIe Coexistence is
selected, EXP_SLR and EXP_EN must be pulled in a valid manner.
Because of the different functionalities of the sDVO/PCIe interface, not all of the pins
will be used in all implementations. Due to the need to minimize test points and
unnecessary routing, the XOR Chain 14 is dynamic depending on the values of
SDVO_CTRLDATA, EXP_SLR, and EXP_EN. Please see the below table for what parts of
XOR Chain 14 become valid XOR inputs depending on the use of SDVO_CTRLDATA,
EXP_SLR, and EXP_EN.
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Datasheet
INTEL [ INTEL ]
