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317607-001 参数 Datasheet PDF下载

317607-001图片预览
型号: 317607-001
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 351 页 / 2481 K
品牌: INTEL [ INTEL ]
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Functional Description  
10.5.1.3  
10.5.1.4  
VESA/VGA Mode  
VESA/VGA mode provides compatibility for pre-existing software that set the display  
mode using the VGA CRTC registers. Timings are generated based on the VGA register  
values and the timing generator registers are not used.  
DDC (Display Data Channel)  
DDC is a standard defined by VESA. Its purpose is to allow communication between  
the host system and display. Both configuration and control information can be  
exchanged allowing plug- and-play systems to be realized. Support for DDC 1 and 2 is  
implemented. The GMCH uses the DDC_CLK and DDC_DATA signals to communicate  
with the analog monitor. The GMCH generates these signals at 2.5 V. External pull-up  
resistors and level shifting circuitry should be implemented on the board.  
The GMCH implements a hardware GMBus controller that can be used to control these  
signals allowing for transactions speeds up to 400 kHz.  
10.5.2  
Digital Display Interface  
The GMCH has several options for driving digital displays. The GMCH contains two  
SDVO ports that are multiplexed on the PCI Express* Graphics interface. When an  
external PCI Express* Graphics accelerator is not present, the GMCH can use the  
multiplexed SDVO ports to provide extra digital display options. These additional  
digital display capabilities may be provided through an ADD2 card, which is designed  
to plug in to a PCI Express connector.  
10.5.2.1  
Multiplexed Digital Display Channels – Intel® SDVOB and  
Intel® SDVOC  
The GMCH has the capability to support digital display devices through two SDVO  
ports multiplexed with the PCI Express* Graphics signals. When an external graphics  
accelerator is used via the PCI Express* Graphics port, these SDVO ports are not  
available.  
The shared SDVO ports each support a pixel clock up to 270 MHz and can support a  
variety of transmission devices.  
SDVOCTRLDATA is an open-drain signal that will act as a strap during reset to tell the  
GMCH whether the interface is a PCI Express interface or an SDVO interface. When  
implementing SDVO, either via ADD2 cards or with a down device, a pull-up is placed  
on this line to signal to the GMCH to run in SDVO mode and for proper GMBus  
operation.  
10.5.2.1.1 ADD2/MEDIA EXPANSION Card  
When an Intel G35 Express Chipset platform uses a PCI Express* graphics connector,  
the multiplexed SDVO ports may be used via an ADD2/Media Expansion card. The  
ADD2/Media Expansion card will be designed to fit a standard PCI Express (x16)  
connector. Refer to the latest ADD2/Media Expansion EDS and ADD2/Media Expansion  
card design kits for more details on ADD2/Media Expansion.  
300  
Datasheet  
 
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