Intel StrataFlash® Wireless Memory (L18)
7.0
AC Characteristics
7.1
AC Test Conditions
AC Input/Output Reference Waveform
VCCQ
Figure 8.
Input VCCQ/2
Test Points
VCCQ/2 Output
0V
Note: AC test inputs are driven at V
for Logic "1" and 0.0 V for Logic "0." Input/output timing begins/ends
CCQ
at V
/2. Input rise and fall times (10% to 90%) < 5 ns. Worst case speed occurs at V = V Min.
CCQ
CC CC
Figure 9.
Transient Equivalent Testing Load Circuit
Device
Under Test
Out
CL
Notes:
1.
2.
3.
See the following table for component values.
Test configuration component value for worst case speed conditions.
C includes jig capacitance.
L
Table 5.
Test configuration component value for worst case speed conditions
Test Configuration
1.35 V Standard Test
1.7 V Standard Test
C (pF)
L
30
30
April 2005
28
Intel StrataFlash® Wireless Memory (L18)
Order Number: 251902, Revision: 009
Datasheet
INTEL [ INTEL ]
