28F400BX-T B 28F004BX-T B
Program and Erase Automation
allows program
and erase operations to be executed using a two-
write command sequence to the CUI The internal
Write State Machine (WSM) automatically executes
the algorithms and timings necessary for program
and erase operations including verifications there-
by unburdening the microprocessor or microcontrol-
ler Writing of memory data is performed in word or
byte increments for the 28F400BX family and in byte
increments for the 28F004BX family typically within
9
ms
which is a 100% improvement over current
flash memory products
The
Status Register (SR)
indicates the status of the
WSM and whether the WSM successfully completed
the desired program or erase operation
Maximum Access Time of
60 ns (t
ACC
)
is achieved
over the commercial temperature range (0 C to
70 C) 5% V
CC
supply voltage range (4 75V to
5 25V) and 30 pF output load Maximum Access
Time of
70 ns (t
ACC
)
is achieved over the commer-
cial temperature range 10% V
CC
supply range (4 5V
to 5 5V) and 100 pF output load
I
PP
maximum Program current is 40 mA for x16
operation and 30 mA for x8 operation I
PP
Erase
current is 30 mA maximum V
PP
erase and pro-
gramming voltage is 11 4V to 12 6V (V
PP
e
12V
g
5%) under all operating conditions
As an op-
tion V
PP
can also vary between 10 8V to 13 2V (V
PP
e
12V
g
10%) with a guaranteed number of 100
block erase cycles
Typical I
CC
Active Current of 25 mA
is achieved
for the X16 products (28F400BX)
Typical I
CC
Ac-
tive Current of 20 mA
is achieved for the X8 prod-
ucts (28F400BX 28F004BX) Refer to the I
CC
active
current derating curves in this datasheet
The 4-Mbit boot block flash memory family is also
designed with an Automatic Power Savings (APS)
feature to minimize system battery current drain and
allows for very low power designs Once the device
is accessed to read array data APS mode will imme-
diately put the memory in static mode of operation
where I
CC
active current is typically 1 mA until the
next read is initiated
When the CE and RP pins are at V
CC
and the
BYTE pin (28F400BX-only) is at either V
CC
or
GND the
CMOS Standby
mode is enabled where
I
CC
is typically
50
mA
A
Deep Power-Down Mode
is enabled when the
RP pin is at ground minimizing power consumption
and providing write protection during power-up con-
ditions
I
CC
current
during deep power-down mode
is
0 20
mA
typical
An initial maximum access time
or Reset Time of 300 ns is required from RP
switching until outputs are valid Equivalently the
device has a maximum wake-up time of 215 ns until
writes to the Command User Interface are recog-
nized When RP is at ground the WSM is reset the
Status Register is cleared and the entire device is
protected from being written to This feature pre-
vents data corruption and protects the code stored
in the device during system reset The system Reset
pin can be tied to RP to reset the memory to nor-
mal read mode upon activation of the Reset pin
With on-chip program erase automation in the
4-Mbit family and the RP functionality for data pro-
tection when the CPU is reset and even if a program
or erase command is issued the device will not rec-
ognize any operation until RP returns to its normal
state
For the 28F400BX Byte-wide or Word-wide In-
put Output Control
is possible by controlling the
BYTE pin When the BYTE pin is at a logic low
the device is in the byte-wide mode (x8) and data is
read and written through DQ 0 7 During the byte-
wide mode DQ 8 14 are tri-stated and DQ15 A-1
becomes the lowest order address pin When the
BYTE pin is at a logic high the device is in the
word-wide mode (x16) and data is read and written
through DQ 0 15
4
INTEL [ INTEL CORPORATION ]
