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    278108-002 参数 Datasheet PDF下载

    278108-002图片预览
    型号： 278108-002
    PDF下载： 下载PDF文件 查看货源
    内容描述： 21154 PCI至PCI桥接器 [21154 PCI-to-PCI Bridge]
    分类和应用： PC
    文件页数/大小： 168 页 / 1562 K
    品牌： INTEL [ INTEL CORPORATION ]
     浏览型号278108-002的Datasheet PDF文件第4页浏览型号278108-002的Datasheet PDF文件第5页浏览型号278108-002的Datasheet PDF文件第6页浏览型号278108-002的Datasheet PDF文件第7页浏览型号278108-002的Datasheet PDF文件第9页浏览型号278108-002的Datasheet PDF文件第10页浏览型号278108-002的Datasheet PDF文件第11页浏览型号278108-002的Datasheet PDF文件第12页  
    21154 PCI-to-PCI Bridge
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    21154 PCI Transactions...................................................................................... 31
    Write Transaction Forwarding ............................................................................. 33
    Write Transaction Disconnect Address Boundaries ............................................ 38
    Read Transaction Prefetching............................................................................. 40
    Read Prefetch Address Boundaries .................................................................... 41
    Device Number to IDSEL s_ad Pin Mapping ...................................................... 48
    21154 Response to Delayed Write Target Termination ...................................... 56
    21154 Response to Posted Write Target Termination ........................................ 57
    21154 Response to Delayed Read Target Termination ...................................... 57
    Summary of Transaction Ordering ...................................................................... 72
    Setting the Primary Interface Detected Parity Error Bit ....................................... 80
    Setting the Secondary Interface Detected Parity Error Bit .................................. 81
    Setting the Primary Interface Data Parity Detected Bit ....................................... 82
    Setting the Secondary Interface Data Parity Detected Bit .................................. 82
    Assertion of p_perr_l ........................................................................................... 83
    Assertion of s_perr_l ........................................................................................... 84
    Assertion of p_serr_l for Data Parity Errors ........................................................ 85
    gpio Operation..................................................................................................... 96
    gpio Serial Data Format ...................................................................................... 96
    Power Management Transitions ....................................................................... 103
    Configuration Register Values After Reset ....................................................... 136
    JTAG Pins ......................................................................................................... 139
    JTAG Instruction Register ................................................................................. 140
    Boundary Scan Order ....................................................................................... 141
    Absolute Maximum Ratings .............................................................................. 149
    Functional Operating Range ............................................................................. 149
    DC Parameters ................................................................................................. 150
    33 MHz PCI Clock Signal AC Parameters ........................................................ 151
    66 MHz PCI Clock Signal AC Parameters ........................................................ 152
    33 MHz PCI Signal Timing ................................................................................ 152
    66 MHz PCI Signal Timing ................................................................................ 153
    Reset Timing Specifications .............................................................................. 154
    33 MHz gpio Timing Specifications ................................................................... 154
    66 MHz gpio Timing Specifications ................................................................... 155
    JTAG Timing Specifications .............................................................................. 155
    304-Point 2-Layer PBGA Package Dimensions ................................................ 158
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    Datasheet

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