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    249033-001 参数 Datasheet PDF下载

    249033-001图片预览
    型号： 249033-001
    PDF下载： 下载PDF文件 查看货源
    内容描述： 集成的T1 LH / SH收发器，用于DS1 / DSX - 1或PRI应用 [Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications]
    分类和应用：
    文件页数/大小： 48 页 / 789 K
    品牌： INTEL [ INTEL CORPORATION ]
     浏览型号249033-001的Datasheet PDF文件第1页浏览型号249033-001的Datasheet PDF文件第2页浏览型号249033-001的Datasheet PDF文件第3页浏览型号249033-001的Datasheet PDF文件第4页浏览型号249033-001的Datasheet PDF文件第6页浏览型号249033-001的Datasheet PDF文件第7页浏览型号249033-001的Datasheet PDF文件第8页浏览型号249033-001的Datasheet PDF文件第9页  
    Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362
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    LXT362 Clock and Data Pins by Mode1 ............................................................... 9
    LXT362 Control Pins by Mode ..............................................................................9
    LXT362 Signal Descriptions ................................................................................10
    CLKE Pin Settings1.............................................................................................18
    Control and Operational Mode Selection ............................................................19
    Diagnostic Mode Availability................................................................................20
    Register Addresses .............................................................................................29
    Register and Bit Summary ..................................................................................29
    Control Register #1 Read/Write, Address (A7-A0) = x010000x ..........................30
    Equalizer Control Input Settings..........................................................................30
    Control Register #2 Read/Write, Address (A7-A0) = x010001x ..........................31
    Control Register #3 Read/Write, Address (A7-A0) = x010010x ..........................31
    Interrupt Clear Register Read/Write, Address (A7-A0) = x010011x....................32
    Transition Status Register Read Only, Address (A7-A0) = x010100x.................32
    Performance Status Register Read Only, Address (A7-A0) = x010101x ............33
    Equalizer Status Register Read Only, Address (A7-A0) = x010110x .................33
    Control Register #4 Read/Write, Address (A7-A0) = x010111x ..........................33
    Transmit Return Loss ..........................................................................................34
    Transformer Specifications for LXT362...............................................................34
    Recommended Transformers for LXT362...........................................................35
    Absolute Maximum Ratings.................................................................................38
    Recommended Operating Conditions .................................................................38
    Digital Characteristics..........................................................................................39
    Analog Characteristics ........................................................................................39
    1.544 MHz T1 Pulse Mask Corner Point Specifications......................................40
    Master and Transmit Clock Timing Characteristics (See
    Figure 15)...................40
    Receive Timing Characteristics (See
    Figure 16).................................................41
    Serial I/O Timing Characteristics (See
    Figure 17
    and
    Figure 18)........................42
    Datasheet
    5

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