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10M08SCU169I7G 参数 Datasheet PDF下载

10M08SCU169I7G图片预览
型号: 10M08SCU169I7G
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 8000-Cell, CMOS, PBGA169, 11 X 11 MM, 0.80 MM PITCH, ROHS COMPLIANT, UBGA-169]
分类和应用: 可编程逻辑
文件页数/大小: 68 页 / 976 K
品牌: INTEL [ INTEL ]
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M10-DATASHEET  
2015.05.04  
58  
Uncompressed Raw Binary File (.rbf) Sizes  
Uncompressed Raw Binary File (.rbf) Sizes  
Table 50: Uncompressed .rbf Sizes and Internal Configuration Time for MAX 10 Devices—Preliminary  
The internal configuration time is based on the uncompressed, unencrypted, and without memory initialization files. Turn on instant-on feature to  
measure the internal configuration time. The internal configuration time measurement is from the minimum value of VCC_ONE (for single supply devices)  
or VCC (for dual supply devices) to user mode entry.  
CFM Data Size (bits)  
Device  
Internal Configuration Time (ms)  
Without Memory Initialization With Memory Initialization  
10M02  
10M04  
10M08  
10M16  
10M25  
10M40  
10M50  
554,000  
1,540,000  
1,540,000  
2,800,000  
4,140,000  
7,840,000  
7,840,000  
676,000  
1,880,000  
1,880,000  
3,430,000  
4,780,000  
9,670,000  
9,670,000  
3
4
4
5
5
9
9
Related Information  
Instant-on, MAX 10 FPGA Configuration User Guide  
Provides more information about instant-on feature.  
I/O Timing  
The data is typically used prior to designing the FPGA to get an estimate of the timing budget as part of the link timing analysis.  
The Quartus II Timing Analyzer provides a more accurate and precise I/O timing data based on the specific device and design after you complete  
place-and-route.  
MAX 10 FPGA Device Datasheet  
Send Feedback  
Altera Corporation  
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