M10-DATASHEET
2015.05.04
12
Internal Weak Pull-Up Resistor
Table 16: Internal Weak Pull-Up Resistor for MAX 10 Devices—Preliminary
Pin pull-up resistance values may be lower if an external source drives the pin higher than VCCIO
.
Symbol
Parameter
Condition
VCCIO = 3.3 V 5%
VCCIO = 3.0 V 5%
VCCIO = 2.5 V 5%
VCCIO = 1.8 V 5%
VCCIO = 1.5 V 5%
VCCIO = 1.2 V 5%
Min
Typ
12
13
15
25
36
82
Max
18
Unit
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
7
8
20
Value of I/O pin pull-up resistor before
and during configuration, as well as user
mode if the programmable pull-up
resistor option is enabled
10
16
20
33
25
R_PU
46
82
175
The internal weak pull-up resistor is defined in the following equation:
Figure 3: Internal Weak Pull-Up Resistor
Minimum condition: –40°C; VCCIO = VCC + 5%; VI = VCC + 5% – 50mV;
Typical condition: 25°C; VCCIO = VCC; VI = 0 V;
Maximum condition: 125°C; VCCIO = VCC – 5%; VI = 0 V;
where VI refers to the input voltage at the I/O pin.
MAX 10 FPGA Device Datasheet
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