A10-DATASHEET
2015.12.31
21
Differential HSTL and HSUL I/O Standards Specifications
Differential HSTL and HSUL I/O Standards Specifications
Table 18: Differential HSTL and HSUL I/O Standards Specifications for Arria 10 Devices—Preliminary
VCCIO (V)
Typ
VDIF(DC) (V)
VDIF(AC) (V)
VIX(AC) (V)
Typ
VCM(DC) (V)
I/O Standard
Min
Max
Min
Max
Min
Max
Min
Max
Min
Typ
Max
HSTL-18 1.71
Class I, II
1.8
1.89
0.2
—
0.4
0.4
0.3
—
0.78
—
1.12
0.78
—
1.12
HSTL-15 1.425 1.5 1.575
Class I, II
0.2
—
—
0.68
—
—
0.9
—
0.68
—
0.9
HSTL-12 1.14
Class I, II
1.2
1.26
0.16
VCCIO
0.3
+
VCCIO
0.48
+
–
0.5 ×
0.4 ×
0.5 ×
0.6 ×
VCCIO
VCCIO VCCIO
VCCIO
HSUL-12 1.14
1.2
1.3
2(VIH(DC) 2(VREF
–
2(VIH(AC) 2(VREF
– VREF
0.5 ×
VCCIO
0.12
0.5 ×
0.5 ×
VCCIO
+0.12
0.4 ×
0.5 ×
0.6 ×
– VREF VIH(DC)
)
)
)
VIH(AC)
)
–
VCCIO
VCCIO VCCIO
VCCIO
Differential I/O Standards Specifications
Table 19: Differential I/O Standards Specifications for Arria 10 Devices—Preliminary
Differential inputs are powered by VCCPT which requires 1.8 V.
(26)
(26)
VCCIO (V)
VID (mV) (25)
VICM(DC) (V)
Condition
VOD (V)
Typ
VOCM (V)
Typ
I/O Standard
Min
Typ
Max
Min
Condition Max
Min
Max
Min
Max
Min
Max
PCML
Transmitter, receiver, and input reference clock pins of high-speed transceivers use the CML I/O standard. For transmitter, receiver, and
reference clock I/O pin specifications, refer to Transceiver Specifications for Arria 10 GX, SX, and GT Devices table.
(25)
The minimum VID value is applicable over the entire common mode range, VCM
RL range: 90 ≤ RL ≤ 110 Ω.
.
(26)
Arria 10 Device Datasheet
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