IN74HCT163A
AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)
Guaranteed Limit
Symbol
Parameter
Unit
25 °C to
-55°C
30
≤85
°C
24
43
51
40
≤125
°C
fmax
tPLH
tPHL
tPLH
Maximum Clock Frequency (Figures 1,6)
Maximum Propagation Delay, Clock to Q
(Figures 1,6)
Maximum Propagation Delay, Enable T
to Ripple Carry Out (Figures 2,6)
20
MHz
ns
ns
ns
34
51
41
32
62
48
tPHL
tPLH
39
35
49
44
59
53
ns
ns
Maximum Propagation Delay, Clock to
Ripple
Carry Out (Figures 1,6)
tPHL
43
15
54
19
65
22
ns
ns
tTLH, tTHL Maximum Output Transition Time, Any
Output, (Figures 1 and 6)
CIN
Maximum Input Capacitance
10
10
10
pF
Power Dissipation Capacitance (Per
Gate)
Typical @25°C,VCC=5.0 V
CPD
Used to determine the no-load dynamic
60
pF
power
consumption:
PD=CPDVCC2f+ICCVCC+∆ICCVCC
TIMING REQUIREMENTS (VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)
Guaranteed Limit
Symbol
Parameter
Unit
25 °C to
≤85
°C
38
≤125
-55°C
°C
tsu
tsu
tsu
tsu
th
Minimum Setup Time, Preset Data Inputs to
Clock (Figure 4)
30
45
ns
ns
ns
ns
ns
ns
ns
ns
ns
Minimum Setup Time, Load to Clock (Figure
4)
27
32
40
10
3
34
40
50
13
3
41
48
60
15
3
Minimum Setup Time, Reset to Clock
(Figure 3)
Minimum Setup Time, Enable T or Enable P
to Clock (Figure 5)
Minimum Hold Time, Clock to Preset Data
Inputs (Figure 4)
th
Minimum Hold Time, Clock to Load (Figure
4)
th
Minimum Hold Time, Clock to Reset (Figure
3)
3
3
3
th
Minimum Hold Time, Clock to Enable T or
Enable P (Figure 5)
3
3
3
trec
Minimum Recovery Time, Load Inactive to
Clock (Figure 4)
25
31
38
tw
tw
tr, tf
Minimum Pulse Width, Clock (Figure 1)
Minimum Pulse Width, Reset (Figure 4)
Maximum Input Rise and Fall Times (Figure
1)
16
16
500
20
20
500
24
24
500
ns
ns
ns
4
INTEGRAL [ INTEGRAL CORP. ]
