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IN74ACT74N 参数 Datasheet PDF下载

IN74ACT74N图片预览
型号: IN74ACT74N
PDF下载: 下载PDF文件 查看货源
内容描述: 双D触发器具有​​置位和复位 [DUAL D FLIP-FLOP WITH SET AND RESET]
分类和应用: 触发器
文件页数/大小: 5 页 / 207 K
品牌: INTEGRAL [ INTEGRAL CORP. ]
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IN74ACT74  
DUAL D FLIP-FLOP WITH SET AND RESET  
High-Speed Silicon-Gate CMOS  
The IN74ACT74 is identical in pinout to the LS/ALS74,  
HC/HCT74. The IN74ACT74 may be used as a level converter  
for interfacing TTL or NMOS outputs to High Speed CMOS  
inputs.  
This device consists of two D flip-flops with individual Set,  
Reset, and Clock inputs. Information at a D-input is transferred to  
the corresponding Q output on the next positive going edge of  
the clock input. Both Q and Q outputs are available from each  
flip-flop. The Set and Reset inputs are asynchronous.  
TTL/NMOS Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS, and TTL  
ORDERING INFORMATION  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 µA; 0.1 µA @ 25°C  
Outputs Source/Sink 24 mA  
IN74ACT74N Plastic  
IN74ACT74D SOIC  
TA = -40° to 85° C for all  
packages  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
FUNCTION TABLE  
Inputs  
Outputs  
Set Rese Clock  
t
Data  
Q
Q
L
H
L
H
L
X
X
X
X
X
X
H
L
X
X
X
H
L
L
H
H*  
L
L
H*  
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
No Change  
No Change  
No Change  
PIN 14 =VCC  
PIN 7 = GND  
*Both outputs will remain high as long as Set  
and Reset are low, but the output states are  
unpredictable if Set and Reset go high  
simultaneously.  
X = don’t care  
1