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IN74ACT373 参数 Datasheet PDF下载

IN74ACT373图片预览
型号: IN74ACT373
PDF下载: 下载PDF文件 查看货源
内容描述: 八路三态同相透明锁存器 [OCTAL 3-STATE NONINVERTING TRANSPARENT LATCH]
分类和应用: 锁存器
文件页数/大小: 5 页 / 232 K
品牌: INTEGRAL [ INTEGRAL CORP. ]
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IN74ACT373  
AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)  
Guaranteed Limits  
Symbol  
Parameter  
Unit  
25 °C  
-40°C to  
85°C  
Min Max Min Max  
tPLH  
tPHL  
tPLH  
Propagation Delay, Input D to Q (Figure 1)  
Propagation Delay, Input D to Q (Figure 1)  
Propagation Delay, Latch Enable to Q 2.5  
2.5  
2.0  
10  
10  
11  
1.5  
1.5  
2.0  
11.5  
11.5  
11.5  
ns  
ns  
ns  
(Figure 2)  
tPHL  
tPZH  
tPZL  
tPHZ  
tPLZ  
CIN  
Propagation Delay, Latch Enable to Q 2.0  
(Figure 2)  
10  
9.5  
9.0  
11  
1.5  
1.5  
1.5  
2.5  
1.0  
11.5  
10.5  
10.5  
12.5  
10  
ns  
ns  
ns  
ns  
ns  
pF  
Propagation Delay, Output Enable to Q 2.0  
(Figure 3)  
Propagation Delay, Output Enable to Q 2.0  
(Figure 3)  
Propagation Delay, Output Enable to Q 2.5  
(Figure 3)  
Propagation Delay, Output Enable to Q 1.5  
(Figure 3)  
8.5  
Maximum Input Capacitance  
4.5  
4.5  
Typical @25°C,VCC=5.0 V  
CPD  
Power Dissipation Capacitance  
40  
pF  
TIMING REQUIREMENTS(VCC=5.0 V ± 10%, CL=50pF, Input tr=tf=3.0 ns)  
Guaranteed Limits  
Symbol  
Parameter  
Unit  
25 °C  
7.0  
0
-40°C to  
85°C  
8.0  
tsu  
th  
Minimum Setup Time, Input D to Latch  
Enable (Figure 4)  
ns  
ns  
ns  
Minimum Hold Time, Latch Enable to  
Input D (Figure 4)  
1.0  
8.0  
tw  
Minimum Pulse Width, Latch Enable  
(Figure 2)  
2.0  
4