IL145567
TSx
td(BTS)
td(ZC)
tW(M)
tW(M)
MCLKX
MCLKR
tSU(MFB)
tW(B)
tW(B)
tSU(BRM)
BCLKX
1
tH(F)
4
2
5
3
6
7
8
9
tSU(F)
tH(BF)
FSx
td(BD)
CH1
td(ZC)
Dx
CH2
ST1
ST2
ST3
CH3
LSB
8
MSB
BCLKR
1
tH(F)
4
2
5
3
6
7
9
tSU(F)
tH(BF)
tSU(DB)
FSR
DR
tH(BD)
tH(BD)
MSB
CH2
ST1
ST2
ST3
CH1
CH3
LSB
At Short Frame synchronisation, synchronisation pulses FSx or FSR should have duration equal to duration
of clock generator MCLK pulses.
Figure 3 – Time diagram at Short Frame synchronisation
8