IA186XL/IA188XL
16-Bit Microcontrollers
Data Sheet
July 6, 2011
Table 8. IA188XL Pin/Signal Descriptions (Continued)
Pin
Signal
lock_n
Name
lock_n
PLCC
48
PQFP
28
LQFP
45
Description
lock. Output. Active Low. When asserted
(low), this signal indicates that the bus cycle in
progress cannot be interrupted. While lock_n
is active, the IA188XL will not service bus
requests such as HOLD.
When resin_n is active, this pin is weakly held
high and must not be driven low.
mcs0_n mcs0_n/pereq
mcs1_n mcs1_n/error_n
38
37
36
35
NA
39
40
41
42
2, 11,
14, 15,
24, 43,
44, 62,
63
57
58
59
60
4, 25,
35, 55,
72
mid-range memory chip select. Output.
mcs2_n
mcs2_n
mcs3_n mcs3_n/nps_n
n.c.
nmi
n.c.
not connected
nmi
46
30
47
non-maskable interrupt. Input. Active High.
When the nmi signal is asserted (high) it
causes a Type 2 interrupt .
pcs0_n
pcs1_n
pcs2_n
pcs3_n
pcs4_n
pcs5_n
pcs6_n
qs0
pcs0_n
pcs1_n
pcs2_n
pcs3_n
pcs4_n
pcs5_n/a1
pcs6_n/a2
ale/qs0
25
27
28
29
30
31
32
61
63
54
52
51
50
49
48
47
10
8
71
69
68
67
66
65
64
29
27
peripheral chip select signals 0–6. Output.
queue status 0, queue status 1. Output.
qs1
wr_n/qs1
QS1 QS0
0
0
0
1
No Queue operations
First byte of opcode pulled from
Queue
1
1
Additional bytes pulled from
Queue
1
0
Queue is flushed
qsmd_n
rd_n
rd_n/qsmd_n
rd_n/qsmd_n
62
62
9
9
28
28
queue status mode. Input. Sampled at reset.
read. output. Active Low. When asserted
(low), rd_n indicates that the accessed
memory or I/O device must drive data from
the location being accessed onto the data
bus.
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