IA88C00
Data Sheet
Microcontroller
As of Production Version -01
Figure 67. 25 MHz Timing
Normal
Min
15
Extended
Min
50
No.
1
Symbol
TdA (AS)
Max
Max
2
ThAS (A)
15
50
3
4
5
6
TdAS (DI)
TwAS
TdAZ (DSR)
TwDSR
140
280
0
26
0
110
65
65
220
142
7
TwDSW
8
9
TdDSR (DI)
ThDSR (DI)
TdDS (A)
TdDS (AS)
TdR/W (AS)
TdDS (R/W)
TdDO (DSW)
ThDSW (DO)
TdA (DI)
TdAS (DSR)
TsDI (DSR)
TdDM (AS)
TdDS (DM)
ThDS (A)
85
195
330
0
0
10
11
12
13
14
15
16
17
18
19
20
21
20
15
15
15
20
15
55
50
50
50
50
50
155
15
25
10
15
15
50
25
45
50
50
Input Handshake Timing
DATA IN
1
5
3
DAV IN
6
4
RDY OUT
7
2
Figure 68. Fully Interlocked Mode (Input Handshake)
Copyright 2005
Innovasic.com
Innovasic Semiconductor
ENG21 1 030617-04
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