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IA8044-PDW40I-00 参数 Datasheet PDF下载

IA8044-PDW40I-00图片预览
型号: IA8044-PDW40I-00
PDF下载: 下载PDF文件 查看货源
内容描述: SDLC通信控制器 [SDLC COMMUNICATIONS CONTROLLER]
分类和应用: 通信控制器光电二极管时钟
文件页数/大小: 32 页 / 135 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA8044/IA8344  
SDLC COMMUNICATIONS CONTROLLER  
Preliminary Data Sheet  
As of Production Version 00  
A.C. Characteristics1  
External Program Memory Characteristics  
Variable Clock 1/TCLCL  
= 3.5 MHz TO 12 MHz  
12 MHz Osc  
Symbol  
Parameter  
Unit  
Min  
Max  
Min Max  
TLHLL  
TAVLL  
ALE Pulse Width  
Address Valid to ALE Low  
ns  
ns  
TLLAX2  
TLLIV  
TLLPL  
TPLPH  
TPLIV  
TPXIX  
TPXIZ3  
TPXAV3  
TAVIV  
TAZPL  
Address Hold After ALE Low  
ALE Low to Valid Instr. In.  
ALE Low to PSENn Low  
PSENn Pulse Width  
PSENn Low to Valid Instr. In  
Input Instr. Hold After PSENn  
Input Instr. Float After PSENn  
ns  
ns  
ns  
ns  
ns  
ns  
PSENn to Address Valid  
Address to Valid Instr. In  
Address Float to PSENn  
ns  
Notes:  
1. Actual values will provided for the External Program Memory Characteristics, External Data  
Memory Characteristics, and Serial Interface Characteristics tables (pp. 26 – 27) upon completion  
of device testing. Values from the original device data sheet may be used to characterize  
parameters in the interim.  
2.TLLAX for access to program memory is different from TLLAX for data memory.  
3. Interfacing RUPI-44 devices with float times up to 75ns is permissible. This limited bus  
contention will not cause any damage to Port 0 drivers  
Copyright  
innovASIC  
2001  
ENG210010112-00  
www.innovasic.com  
Customer Support:  
1-888-824-4184  
The End of Obsolescence  
Page 26 of 32  
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