IA8044/IA8344
Data Sheet
SDLC Communications Controller
March 30, 2010
4.7.12 Timer/Counter Configuration
Figures 7, 8, 9, and 10 present the configurations of Timer 0 Mode 0, Timer 0 Mode 1, Timer 0
Mode 2, and Timer 0 Mode 3, respectively.
OSC
12
C/T
C/T
0
1
TLO
( 5 Bits )
TH0
( 8 Bits)
TF0
Interrupt
P3.4/T0
=1
Control
&
TR0
Gate
1
P3.2/INT0
Figure 7. Timer 0 Mode 0
OSC
12
C/T
C/T
0
1
TLO
( 8 Bits )
TH0
( 8Bits)
TF0
Interrupt
P3.4/T0
=1
Control
&
TR0
Gate
1
P3.2/INT0
Figure 8. Timer 0 Mode 1
®
IA211010112-04
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