IA186ER/IA188ER
Data Sheet
16-Bit/8-Bit Microcontrollers with RAM
February 25, 2013
2.2.35 sclk/pio20 —Serial Clock (synchronous outputs with tristate)
Because this pin provides a slave device with a synchronous serial clock it permits
synchronization of the transmit and receive data exchanges between the slave and the
microcontroller. The sclk is the result of dividing the internal clock by 2, 4, 8, or 16, depending
on the contents of the Synchronous Serial Control (SSC) register Bits [5–4]. Accessing either
the SSR or SSD registers activates the sclk for eight cycles. When sclk is not active, the
microcontroller holds it high.
2.2.36 sdata/pio21 —Serial Data (synchronous inout)
The sdata pin connects a slave device to synchronous serial transmit and receive data. The last
value is retained on this pin when it is inactive.
2.2.37 sden1/pio23 – sden0/pio22 —Serial Data Enables (synchronous outputs with
tristate)
The sden1–sden0 pins facilitate the transfer of data on ports 1 and 0 of the Synchronous Serial
Interface (SSI). Either sden1 or sden0 is asserted by the microcontroller at the start of the data
transfer and is de-asserted when the transfer is completed. These pins are held low by the
microcontroller when they are inactive.
2.2.38 srdy/pio6—Synchronous Ready (synchronous level-sensitive input)
This signal is an active high input synchronized to clkouta and indicates to the microcontroller
that a data transfer will be completed by the addressed memory space or I/O device.
In contrast to the Asynchronous Ready (ardy), which requires internal synchronization, srdy
permits easier system timing because it already synchronized. Tying srdy high will always assert
this ready condition. Tying it low will give control to ardy.
2.2.39 tmrin0/pio11—Timer Input 0 (synchronous edge-sensitive input)
This signal may be either a clock or control signal for the internal Timer 0. The timer is
incremented by the microcontroller after it synchronizes a rising edge of tmrin0. When not used,
tmrin0 must be tied high, or when used as pio11, it is pulled up internally.
2.2.40 tmrin1/pio0—Timer Input 1 (synchronous edge-sensitive input)
This signal may be either a clock or control signal for the internal Timer 1. The timer is
incremented by the microcontroller after it synchronizes a rising edge of tmrin1. When not used,
tmrin1 must be tied high, or when used as pio0, it is pulled up internally.
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