IA186ES/IA188ES
Data Sheet
8-Bit/16-Bit Microcontrollers
November 15, 2011
Table 89. Instruction Set Summary (Continued)
Instruction
Opcode – Hex
Clock Cycles
Flags Affected
Byte
3–6
–
Mnemonic
JCXZ
JE
Description
Byte 1
E3
74
Byte 2
cb
cb
IA186ES
15,5
13, 4
IA188ES
15,5
13, 4
O
–
–
D
–
–
I
–
–
T
–
–
S
–
–
Z
–
–
A
–
–
P
–
–
C
–
–
Jump short if CX reg is 0
Jump short if equal (Z=1)
Jump short if 0 (Z=1)
–
JZ
JG
JNLE
Jump short if greater (Z & S = O)
Jump short if not less or equal
(Z & S = O)
Jump short if greater or equal
(S=O)
Jump short if not less (S = O)
Jump short if less or equal
(Z & S = O)
7F
7D
7E
cb
cb
cb
–
–
–
13, 4
13, 4
13, 4
13, 4
13, 4
13, 4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
JGE
JNL
JLE
JNG
JMP
Jump short if not greater
(Z & S = O)
Jump short direct, disp relative to
next instruction
Jump near direct, disp relative to
next instruction
EB
E9
cb
–
–
14
14
14
14
–
–
–
–
–
–
–
–
–
cw
Jump near indirect
Jump far direct to doubleword
imm address
FF
EA
/4
cd
–
–
11/17
14
11/21
14
Jump m16:16 indirect and far
Jump short if not equal (Z=0)
Jump short if not zero (Z=0)
Jump short if not overflow (O=1)
Jump short if not parity (P=0)
Jump short if parity odd (P=0)
Jump short if not sign (S=0)
Jump short if overflow (O=1)
Jump short if parity (P=1)
Jump short if parity (P=1)
Jump short if sign (S=1)
Load AH with low byte of flags reg
Load DS:r16 with segment:offset
from memory
FF
75
/5
cb
–
–
26
13, 4
34
13, 4
JNE
JNZ
JNO
JNP
JPO
JNS
JO
JP
JPE
JS
–
–
–
–
–
–
–
–
–
71
7B
cb
cb
–
–
13, 4
13, 4
13, 4
13, 4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
79
70
7A
cb
cb
cb
–
–
–
13, 4
13, 4
13, 4
13, 4
13, 4
13, 4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
78
9F
C5
cb
–
/r
–
–
–
13, 4
2
18
13, 4
2
26
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
LAHF
LDS
LEA
Load offset for m16 word in 16-bit
reg
8D
/r
–
6
6
–
–
–
–
–
–
–
–
–
LEAVE
LES
Destroy procedure stack frame
Load ES:r16 with segment offset
from memory
C9
C4
–
/r
–
–
8
18
8
26
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
LOCK
LODS
Asserts lock_n during an
instruction execution
F0
–
–
–
–
1
1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Load byte segment:[SI] in AL
Load word segment:[SI] in AX
Load byte DS:[SI] in AL
Load word DS:[SI] in AX
Decrement count; jump short if
AC
AD
AC
AD
E2
12
12
12
12
16, 6
12
16
12
16
16, 6
LODSB
LODSW
LOOP
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
CX
0
LOOPE
LOOPZ
Decrement count; jump short if
CX 0 and Z = 1
Decrement count; jump short if
CX 0 and Z = 1
Decrement count; jump short if
CX 0 and Z = 0
Decrement count; jump short if
CX 0 and Z = 0
E1
cb
LOOPNE
LOOPNZ
E0
cb
–
16, 6
16, 6
Refer to the key for abbreviations and an explanation of notation at the end of this table.
®
IA211050902-19
UNCONTROLLED WHEN PRINTED OR COPIED
http://www.innovasic.com
Customer Support:
Page 137 of 154
1-888-824-4184