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AM186EM-25VIW 参数 Datasheet PDF下载

AM186EM-25VIW图片预览
型号: AM186EM-25VIW
PDF下载: 下载PDF文件 查看货源
内容描述: 8位/ 16位微控制器 [8-Bit/16-Bit Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 146 页 / 1574 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA186EM/IA188EM  
Data Sheet  
8-Bit/16-Bit Microcontrollers  
February 25, 2011  
2.2.18 int2/inta0_n/pio31Maskable Interrupt Request 2 (asynchronous  
input)/Interrupt Acknowledge 0 (synchronous output) ..................................34  
2.2.19 int3/inta1_n/irqMaskable Interrupt Request 3 (asynchronous  
input)/Interrupt Acknowledge 1 (synchronous output)/Interrupt  
Acknowledge (synchronous output)...............................................................34  
2.2.20 int4/pio30Maskable Interrupt Request 4 (asynchronous input)..................34  
2.2.21 lcs_n/once0_nLower Memory Chip Select (synchronous output  
with internal pull-up)/ONCE Mode Request (input)......................................35  
2.2.22 mcs2_nmcs0_n (no pio, pio15, pio 14)Midrange Memory Chip  
Selects (synchronous outputs with internal pull-up) ......................................35  
2.2.23 mcs3_n/rfsh_n (pio25)Midrange Memory Chip Select  
(synchronous output with internal pull-up)/Automatic Refresh  
(synchronous output) ......................................................................................35  
2.2.24 nmiNonmaskable Interrupt (synchronous edge-sensitive input) ................35  
2.2.25 pcs3_npcs0_n (pio19pio16)Peripheral Chip Selects 30  
(synchronous outputs).....................................................................................36  
2.2.26 pcs5_n/a1Peripheral Chip Select 5 (synchronous output)/Latched  
Address Bit 1 (synchronous output) ...............................................................36  
2.2.27 pcs6_n/a2Peripheral Chip Select 6 (synchronous output)/latched  
Address Bit 2 (synchronous output) ...............................................................36  
2.2.28 pio31pio0Programmable I/O Pins (asynchronous input/output  
open-drain)......................................................................................................37  
2.2.29 rd_nRead strobe (synchronous output with tristate)...................................37  
2.2.30 res_nReset (asynchronous level-sensitive input)........................................37  
2.2.31 rfsh2_n/aden_n (IA188EM)Refresh 2 (synchronous output with  
tristate)/Address Enable (input with internal pull-up)....................................37  
2.2.32 rxd/pio28Receive Data (asynchronous input) ............................................37  
2.2.33 s2_ns0_nBus Cycle Status (synchronous outputs with tristate) ...............38  
2.2.34 s6/clkdiv2_n/pio29Bus Cycle Status Bit 6 (synchronous  
output)/Clock Divide by 2 (input with internal pull-up) ................................38  
2.2.35 sclkSerial Clock (synchronous outputs with tristate) .................................38  
2.2.36 sdataSerial Data (synchronous inout).........................................................39  
2.2.37 sden1sden0Serial Data Enables (synchronous outputs with  
tristate)............................................................................................................39  
2.2.38 srdy/pio6Synchronous Ready (synchronous level-sensitive input)............39  
2.2.39 tmrin0/pio11Timer Input 0 (synchronous edge-sensitive input) ................39  
2.2.40 tmrin1/pio0Timer Input 1 (synchronous edge-sensitive input) ..................39  
2.2.41 tmrout0/pio10Timer Output 0 (synchronous output) .................................39  
2.2.42 tmrout1/pio1Timer Output 1 (synchronous output) ...................................39  
2.2.43 txd/pio22Transmit Data (asynchronous output) .........................................39  
2.2.44 ucs_n/once1_nUpper Memory Chip Select (synchronous  
output)/ONCE Mode Request 1 (input with internal pull-up)........................40  
2.2.45 uzi_n/pio26Upper Zero Indicate (synchronous output)..............................40  
®
IA211050831-19  
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