IA186EM/IA188EM
Data Sheet
8-Bit/16-Bit Microcontrollers
February 25, 2011
Table 42. PDATA 0......................................................................................................................78
Table 43. PDATA 1......................................................................................................................78
Table 44. PIO Mode and PIO Direction Settings .........................................................................79
Table 45. PDIR0 ...........................................................................................................................79
Table 46. PDIR1 ...........................................................................................................................79
Table 47. PIOMODE0 ..................................................................................................................79
Table 48. PMODE1 ......................................................................................................................80
Table 49. Timer 0 and Timer 1 Mode and Control Registers.......................................................80
Table 50. Timer 2 Mode and Control Registers ...........................................................................81
Table 51. Timer Maxcount Compare Registers............................................................................82
Table 52. Timer Count Registers..................................................................................................83
Table 53. Serial Port Interrupt Control Registers .........................................................................83
Table 54. Watchdog Timer Interrupt Control Register.................................................................84
Table 55. INT4 Control Register ..................................................................................................84
Table 56. INT2/INT3 Control Register ........................................................................................85
Table 57. INT0/INT1 Control Register ........................................................................................86
Table 58. Timer Control Unit Interrupt Control Register.............................................................86
Table 59. Timer Interrupt Control Register..................................................................................87
Table 60. DMA and Interrupt Control Register (Master Mode)...................................................87
Table 61. DMA and Interrupt Control Register (Slave Mode).....................................................88
Table 62. Interrupt Status Register (Master Mode) ......................................................................88
Table 63. Interrupt Status Register (Slave Mode) ........................................................................89
Table 64. Interrupt Request Register (Master Mode)...................................................................89
Table 65. Interrupt Request Register (Slave Mode) .....................................................................90
Table 66. In-Service Register (Master Mode) ..............................................................................91
Table 67. In-Service Register (Slave Mode).................................................................................91
Table 68. Priority Mask Register..................................................................................................92
Table 69. Interrupt MASK Register (Master Mode) ....................................................................93
Table 70. Interrupt MASK Register (Slave Mode).......................................................................93
Table 71. POLL Status Register ...................................................................................................94
Table 72. Poll Register..................................................................................................................95
Table 73. End-of-Interrupt Register..............................................................................................95
Table 74. Specific End-of-Interrupt Register................................................................................95
Table 75. Interrupt Vector Register ..............................................................................................96
Table 76. Synchronous Serial Receive Register...........................................................................96
Table 77. Synchronous Serial Transmit Registers........................................................................97
Table 78. Synchronous Serial Control Registers..........................................................................97
Table 79. Synchronous Serial Status Registers.............................................................................98
Table 80. AC Characteristics Over Commercial Operating Ranges (40 MHz)............................99
Table 81. Alphabetic Key to Waveform Parameters ..................................................................102
Table 82. Numeric Key to Waveform Parameters......................................................................104
Table 83. Read Cycle Timing.....................................................................................................108
Table 84. Write Cycle Timing ....................................................................................................111
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