XC835/836
Electrical Parameters
Table 8
Input/Output Characteristics (Operating Conditions apply) (cont’d)
Parameter
Symbol
Limit Values Unit Test Conditions
Min.
SR –
Max.
0.3
5)
Voltage on any pin
during VDDP power off
VPO
V
Maximum current per IMP
SR -15
25
mA
–
pin (excluding P1,
V
DDP and VSS)
Maximum current per IMP1A SR -50
50
mA
mA
mA
mA
–
pin for P1[3:0]
Maximum current per IMP1B SR -30
50
–
pin for P1[5:4]
4)
Maximum current
into VDDP
IMVDDP SR –
130
130
4)
Maximum current out IMVSS SR –
of VSS
1) Not subjected to production test, verified by design/characterization. Hysteresis is implemented to avoid meta
stable states and switching due to internal ground bounce. It cannot be guaranteed that it suppresses switching
due to external system noise.
2) An additional error current (IINJ) will flow if an overload current flows through an adjacent pin.
3) Over current detection is available for 5V application only.
4) Not subjected to production test, verified by design/characterization.
5) Not subjected to production test, verified by design/characterization. However, for applications with strict low
power-down current requirements, it is mandatory that no active voltage source is supplied at any GPIO pin
when VDDP is powered off.
Data Sheet
27
V1.2, 2011-03
INFINEON [ Infineon ]
