TLE9879QXA40
GPIO Ports and Peripheral I/O
14.3
TLE9879QXA40 Port Module
Port 0
14.3.1
14.3.1.1 Port 0 Functions
Table 8
Port Pin
P0.0
Port 0 Input/Output Functions
Input/Output
Select
GPI
Connected Signal(s)
P0_DATA.P0
SWCLK / TCK_0
T12HR_0
T4INA
From/to Module
Input
INP1
INP2
INP3
INP4
INP5
INP6
GPO
ALT1
ALT2
ALT3
GPI
SW
CCU6
GPT12T4
Timer 2
–
T2_0
–
EXINT2_3
P0_DATA.P0
T3OUT
SCU
Output
Input
GPT12T3
Timer 21
UART2
EXF21_0
RXDO_2
P0_DATA.P1
T13HR_0
TxD1
P0.1
INP2
INP3
INP4
INP5
INP6
INP7
INP8
GPO
ALT1
ALT2
ALT3
CCU6
LIN_TxD
GPT12CAP
Timer 21
GPT12T4
SSC1
CAPINA
T21_0
T4INC
MRST_1_2
EXINT0_2
P0_DATA.P1
TxD1
SCU
Output
UART1 / LIN_TxD
–
–
T6OUT
GPT12T6
Data Sheet
47
Rev. 1.0, 2015-04-30
INFINEON [ Infineon ]
