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SAB82526N 参数 Datasheet PDF下载

SAB82526N图片预览
型号: SAB82526N
PDF下载: 下载PDF文件 查看货源
内容描述: 数据通信芯片 [Data Communications ICs]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路数据通信数据传输时钟
文件页数/大小: 126 页 / 720 K
品牌: INFINEON [ Infineon ]
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SAB 82525  
SAB 82526  
SAF 82525  
SAF 82526  
PCE … Protocol Error (significant in auto-mode only!)  
The HSCX has detected a protocol error, i.e. it has received  
– an S-, or I-frame with incorrect N (R)  
– an S-frame containing an I-field.  
RFO … Receive Frame Overflow  
One frame could not be stored due to occupied RFIFO (i.e. whole frame has been lost). This  
interrupt can be used for statistical purposes and indicates, that the CPU does not respond  
quickly enough to an incoming RPF, or RME interrupt.  
CSC … Clear to send Status Change  
Indicates, that a state transition has occurred at the CTS pin. The actual state can be read  
from STAR register (CTS bit).  
This interrupt must be enabled setting the CIE bit in CCR2.  
RFS. . .Receive Frame Start  
This is an early receiver interrupt activated after the start of a valid frame has been detected,  
i.e. after a valid address check in operation modes providing address recognition, otherwise  
after the opening flag (transparent mode 0), delayed by two bytes.  
After an RFS interrupt, the contents of  
RHCR  
RAL1  
RSTA – bit 3-0  
are valid and can be read by the CPU.  
This interrupt must be enabled setting the RIE bit in CCR2.  
Semiconductor Group  
85  
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