PEB 2091
PEF 2091
Operational Description
Synchronized 2
In this state the IEC-Q has received UOA = 1. This is a request to activate the
S/T-reference point. The loop-back commands detected by the EOC-processor control
the output of indications and transmit signals:
– Normal activation and UOA = (1):
– Single channel loop-back and UOA = (1):
– Loop-back 2 (LBBD):
SN3 and AR
SN3T and AR
SN3T and ARL
– The value of the issued SAI-bit depends on the received C/I-channel code: DI and TIM
lead to SAI = 0, any other C/I-code sets the SAI-bit to 1 indicating activity on the
S/T-interface. The IEC-Q waits for the receipt of the C/I-channel code AI to enter the
"Wait for ACT" state.
Test
The "Test" mode is entered when the unconditional commands RES, SSP, Pin-RES,
Pin-SSP or µP-SSP are used. It is left when normal IEC-Q operation is selected, i.e.
reset and test modes are not active, and the C/I-channel codes DI or ARL are received.
The following signals are transmitted on the U-interface:
– No signal level (SN0) when the C/I-channel code RES is applied or a hardware reset
is activated.
– Single pulses (SP) when one of the SSP commands is applied.
Transparent
This state is entered upon the detection of ACT = 1 received from the LT side and
corresponds to the fully active state. In the case of a normal activation in both directions
of transmission the following codes are output:
– Normal activation or single-channel loop-back:
– Loop-back 2:
AI
AIL
Wait for ACT
Upon the receipt of AI, the ACT-bit is set to "1" and the NT waits for a response (ACT = 1)
from the LT side. The output of indications and transmit signals is as defined for the
"Synchronized" state.
Wait for SF
Upon detection of SL2, the signal SN2 is sent on the U-interface and the Receiver waits
for detection of the superframe indication. Timer T1 is then stopped and the
"Synchronized" state is entered.
Semiconductor Group
172
Data Sheet 01.99
INFINEON [ Infineon ]
