Micropower Dual 150mA CMOS RF LDO™ Regulators with 75dB Ripple Rejection
Advance
APPLICATIONS INFORMATION
+V
IN
A and B
These pins are connected internally through a galvanic
connection for maximum power from each regulator, both
V
INA
and V
INB
must be connected externally to V
DD
.
Enable/Shutdown
Forcing EN
A
and/or EN
B
to a voltage greater than 2V,
enables the regulator(s). These inputs are CMOS logic
compatible gates. If this feature is not required, connect
EN
A
and/or EN
B
to V
IN
. Note that V
INA
and V
INB
are con-
nected internally. To minimize the effect of imbalanced
current sharing and possible noise, both V
INA
and V
INB
should also be connected externally.
Input Capacitor
A 1µF capacitor should be placed from V
INA/B
to GND if
there is more than 10 inches of wire between the input and
the ac filter capacitor or if a battery is used as the input.
Reference Bypass Capacitor
C
NOISE
(the reference voltage bypass capacitor) is con-
nected to the internal V
ref
which is common to regulator's
A and B. A 22pF capacitor connected between C
NOISE
and
GND decouples the reference output voltage and provides
a significant reduction in regulator output noise. An effect
of C
NOISE
also reduces the regulator phase margin. When
using C
NOISE
, output capacitors of 2.2µF or greater are
required to maintain stability.
Also affected by C
NOISE
is the start up speed of the ICL7280.
The speed is inversely proportional to the value of C
NOISE
. If
a slow or delayed start up time is desired, a larger value of
C
NOISE
is used. Conversely, faster start up times or instant-on
applications will require smaller values of C
NOISE
or its omis-
sion with the pin left open. The trade-off of noise to response
should be considered.
Output Capacitor
An output capacitor is required from V
OUTA
and V
OUTB
to
GND to prevent oscillation and minimize the effect of load
transient currents. The minimum size of the output capac-
itor(s) is dependent on the usage of C
NOISE
and its value.
Without C
NOISE
, a minimum of 1µF is recommended. For
C
NOISE
= 22pF, a minimum of 2.2µF is recommended
(See figure 1). Larger values of output capacitance will
slow the regulator's response during power up. The upper
limit of capacitance is indefinite, however, it should have
an equivalent series resistance (ESR) of approximately
5Ω or less and a series resonance above 1MHz. Stability
is assured with the use of a capacitor having ultra-low
ESR and as such will not produce low amplitude oscilla-
tions nor an underdamped transient response. This
allows the use of modern ceramic capacitors in prefer-
ence to their more costly Tantalum counterparts.
If the system design calls for smaller load currents, lower
capacitance may be used. Below 10mA the capacitance
may be reduced to 0.47µF and below 1mA to 0.33µF.
No-Load Stability
The ILC7280 will remain stable and in regulation with no
load current. These are desirable performance features
for applications such as keep-alive modes in CMOS sys-
tems.
Split-Supply Operation
When using the ILC7280 in a system requiring that the
load be returned to the negative voltage source, the out-
put(s) must be diode clamped to inhibit significant volt-
age excursions below ground. A simple external diode
clamp to ground will afford protection from damage to
the device. (See figure below).
+V
IN
V
OUTA
or V
OUTB
ILC7280
EN
A
/EN
B
Dual Regulator
Dext
Rload
-V
IN
External Diode, Dext inhibits significant voltage excursions
below ground in a split power supply load return.
Impala Linear Corporation
ILC7280 1.8
(408) 574-3939
www.impalalinear.com
May 2000
7
IMPALA [ Impala Linear Corporation ]
