50/100mA SOT-23 CMOS RF LDO™ Regulators
5
1
4
3
2
Figure 9: Recommended application circuit layout
(not drawn to scale). Note: ground plane is bottom layer
of PCB and connects to top layer ground connections
through vias
Figure 8: Recommended application circuit schematic
Evaluation Board Parts List For Printed Circuit Board Shown Above
Label
U1
Part Number
ILC7081AIM5-30
69190-405
Manufacturer
Impala Linear
Berg
Description
100mA RF LDO™
J1
Connector, four position header
CIN
GRM40 Y5V 105Z16
muRata
Ceramic capacitor, 1µF, 16V, SMT
(size 0805)
CNOISE
COUT
ECU-V1H103KBV
Panasonic
muRata
Ceramic Capacitor, 0.01µF, 16V,
SMT (size 0603)
GRM42-
6X5R475K10
Ceramic Capacitor, 4.7µF, 16V, SMT
(size 1206)
Grounding Recommendations
Layout Considerations
1. Connect CIN between VIN of the ILC7080/81 and the 1. Place all RF LDO related components; ILC7080/81,
input capacitor CIN, noise bypass capacitor CNOISE and
output capacitor COUT as close together as possible.
“GROUND PLANE”.
2.
Keep the ground side of COUT and CNOISE connected to
Keep the output capacitor COUT as close to the
2.
3.
the “LOCAL GROUND” and not directly to the
“GROUND PLANE”.
ILC7080/81 as possible with very short traces to the
VOUT and GND pins.
3. On multilayer boards use component side copper for
grounding around the ILC7080/81 and connect back to a
“GROUND PLANE” using vias.
The traces for the related components; ILC7080/81,
input capacitor CIN, noise bypass capacitor CNOISE and
output capacitor COUT can be run with minimum trace
widths close to the LDO.
4. If using a DC-DC converter in your design, use a star
grounding system with separate traces for the power
ground and the control signals. The star should radiate
from where the power supply enters the PCB.
4. Maintain a separate “LOCAL GROUND” remote from
the “GROUND PLANE” to ensure a quiet ground near
the LDO.
Figure 9 shows how this circuit can be translated into a
PCB layout.
Impala Linear Corporation
(408) 574-3939
ILC7080/81 1.1
www.impalalinear.com
Sept. 1998
9