1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Electrical Characteristics ILC6382CIR-50
Unless otherwise specified all limits are at V
OUT
= 5V, V
IRI
= 1.5V, Fosc = 300kHz and T
A
= 25°C. Test circuit of figure 1.
BOLDFACE
type indicates limits that apply over the full operating temperature range.
Note 2.
Parameter
Output Voltage
Output Current
Symbol
V
OUT
I
OUT
Conditions
0.9V < V
IN
< 3V, I
OUT
= 0mA
0.9V < V
IN
< 3V, I
OUT
= 0mA
V
IN
= 1.2V, V
OUT
= V
OUT(nom)
± 4%
V
IN
= 2.4V, V
OUT
= V
OUT(nom)
± 4%
V
IN
= 3.0V, V
OUT
= V
OUT(nom)
± 4%
Load Regulation
No Load Battery
Input Current
Efficiency
η
V
IN
= 2.4V, I
OUT
= 3mA
V
IN
= 2.4V, I
OUT
=100mA
85
92
%
I
IN ( no load )
V
IN
= 2.4V, 0mA < I
OUT
< 60mA
V
IN
= 2.4V, I
OUT
= 0mA
Min
4.950
4.900
50
110
160
3
250
%
µA
Typ
5.000
Max
5.050
5.100
mA
Units
V
General Electrical Characteristics for all voltage versions.
Unless otherwise specified all limits are at V
IN
= 2.4V, V
IRI
= 1.5V, Fosc = 300kHz, I
OUT
= 0mA and T
A
= 25°C. Test cir-
cuits of figure 1 and figure 2 for ILC6382CIR-XX and ILC6382CIR-ADJ respectively.
BOLDFACE
type indicates limits
that apply over the full operating temperature range.
Note 2.
Parameter
Minimum startup voltage
Input voltage range
Battery input current in load
disconnect mode
Switch on resistance
Oscillator frequency
External clock frequency range
(sync)
External clock pulse width
External clock rise/fall time
LBI input threshold
Input leakage current
LBI hold time
Symbol
V
IN(start)
V
IN
I
IN(SD)
R
ds(on)
f
osc
f
sync
t
W(sync)
t
r
/ t
f
V
REF
I
LEAK
t
hold(LBI)
Note 4
Note 4
Conditions
I
OUT
= 0mA
V
OUT =
V
OUT(nominal) ± 4%
I
OUT
= 0mA
(Note 3)
V
LBI/SD
< 0.4V, V
OUT
= 0V
(short circuit)
N-Channel MOSFET
P-Channel MOSFET
Min
0.9
1
1
400
750
300
Typ
0.9
Max
1
6
6
2
Units
V
V
ΩA
255
150
200
1.175
1.150
Pins LBI/SD, Sync and V
FB
,
Note 4
Note 5
120
345
500
mΩ
kHz
kHz
ns
ns
V
nA
ms
1.250
100
1.325
1.350
200
100
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
4