Step-Up/Step-Down DC-DC Converter for 1-Cell Lithium-Ion Batteries
In the ILC6360, the switchover from PWM to PFM mode
occurs when the PWM waveform drops to a low duty cycle.
The low PWM duty cycle indicates to the controller that the
load current is small and so it switches over to the PFM
mode to improve efficiency and conserve power.
The Dual PWM/PFM mode architecture was designed
specifically for applications such as wireless communica-
tions, which need the spectral predictability of a PWM-type
DC-DC converter, yet also need the highest efficiencies
possible, especially in standby mode.
Other Considerations
The other limitation of the PWM techniques is that, while the
fundamental switching frequency is easier to filter out since
it’s constant, the higher order harmonics of PWM will be
present and may have to be filtered out as well. Any filter-
ing requirements, though, will vary by application and by
actual system design and layout, so generalizations in this
area are difficult, at best.
However, PWM control for boost DC-DC conversion is
widely used, especially in audio-noise sensitive applica-
tions or applications requiring strict filtering of the high
frequency components.
External Frequency Synchronization
External frequency synchronization is allowed on the
ILC6360. When an external signal between 150kHz to
500kHz is connected to pin 4, the internal oscillator will be
over-ridden. This technique is useful when designers wish
to synchronize two or more converters using the same
external source in order to avoid unexpected harmonics.
Connect pin 4 to ground or V
IN
if the external frequen-
cy synchronization function is not used.
Low Battery Detector
The ILC6360’s low battery detector is a based on a CMOS
comparator. The negative input of the comparator is tied to
an internal 1.25V (nominal) reference, V
REF
. The positive
input is the LBI/SD pin. It uses a simple potential divider
arrangement with two resistors to set the LBI threshold as
shown in figure 4. The input bias current of the LBI pin is
only 200nA. This means that the resistor values R1 and R2
can be set quite high. The formula for setting the LBI
threshold is:
V
LBI
= V
REF
x (1+R5/R6)
2 V
IN
ILC6360
Shutdown
R5
3
LBI/SD
R6
+
-
DELAY
100ms
V
CC
R3
6
LBO
1.25V
Internal
Reference
7 GND
Fig 4: Low Battery Detector
Since the LBI input current is negligible (<200nA), this
equation is derived by applying a voltage divider formula
across R6. A typical value for R6 is 100kΩ.
R5 = 100kΩ x [(V
LBI
/V
REF
) -1], where V
REF
=1.25V (nom.)
The LBI detector has a built in delay of 120ms. In order to
obtain a valid low-battery-output (LBO) signal, the input
voltage must be lower than the low-battery-input (LBI)
threshold for a duration greater than the low battery hold
time (t
hold(LBI)
) of 120msec. This feature eliminates false
triggering due to voltage transients at the battery terminal
caused by high frequency switching currents.
The output of the low battery detector is an open drain
capable of sinking 2mA. A 10kΩ pull-up resistor is recom-
mended on this output.
Note that when the device is not
in PWM mode or is in shutdown the low battery detec-
tor does not operate.
Shut Down
The LBI pin is shared with the shutdown pin. A low voltage
(<0.4V) will put the ILC6360 into a power down state. The
simplest way to implement this is with an FET across R6 as
shown in figure 5.
When the ILC6360 is shut down, the synchronous rectifier
disconnects the output from the input. This ensures that
there is only leakage (I
SD
< 1µA typical) from the input to the
output so that the battery is not drained when the ILC6360
is shut down.
Impala Linear Corporation
ILC6360 1.1
(408) 574-3939
www.impalalinear.com
Jan 1999
7
IMPALA [ Impala Linear Corporation ]
