µP Supervisory Circuit
Preliminary
Absolute Maximum Ratings
Parameter
Symbol
Ratings
-0.3 to 7.0
-0.3 to (VCC + 0.3)
250
Units
Terminal Voltage
Input Current
VCC
All other inputs
VCC
V
V
mA
mA
°C
GND All other inputs
TA
25
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
Power Dissipation
-40 to +85
-65 to +150
300
°C
°C
700
mW
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at
or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability.
Operating ranges define those limits between which the functionality of the device is guaranteed.
Electrical Characteristics
VCC = 3 to 5.5V, TA = Operating Temperature Range, unless otherwise noted.
Parameter
Conditions
Min
Typ
Max
5.5
Units
V
Supply Voltage Range, VCC
Supply Current, ICC
VCC = 5V (See Note 1)
VCC = 3.3V (See Note 1)
VIH, VCC > 2.7V
18
15
30
µA
25
ST and PBRST Input Levels
2.0
VCC –0.4
-0.3
VCC + 0.3
VCC + 0.3
0.5
VIH, VCC < 2.7V
V
VIL
Input Leakage PBRST, IIL
Output Voltage, RST, RST
Output Voltage, RST, RST
Output Voltage, RST
(See Note 2)
±1
µA
V
ISOURCE = 350µA, VCC = 3.3V
ISINK = 10mA, VCC = 3.3V
ISINK = 50µA, VCC = 1.4V
2.4
0.4
0.3
V
V
VCC 5% Trip Point (Reset Threshold Voltage)
VCC 10% Trip Point (Reset Threshold Voltage)
Input Capacitance, ST, TOL
Output Capacitance, RST, RST
PBRST Min. Pulse Width, tPB
PBRST Delay, tPBD
TOL= GND
2.80
2.47
2.88
2.55
2.97
2.64
5
V
TOL= VCC
V
CIN (See Note 3)
COUT (See Note 3)
PBRST = VIL (See note 4)
pF
pF
ms
ms
ms
ns
7
20
1
4
20
Reset Active Time, tRST
250
20
610
1000
ST Pulse Width, tST
ST Timeout Period, tTD
TD = 0V
62.5
250
500
150
600
250
1000
2000
TD = Open
TD = VCC
ms
120
0
VCC Fall Time, tF
40
0
µs
ns
VCC Rise Time, tR
VCC Detect to RST Low and RST High, tRPD
VCC Detect to RST Open and RST Low, tRPU
5
8
VCC Falling at 1.66 mV/µs
µs
VCC Rising
250
610
1000
ms
Note 1: ICC is measured with PBRST and all outputs open and inputs within 0.5V of supply rails.
Note 2: PBRST has an internal 40kΩ (typical) pull-up resistor to VCC
.
Note 3: Guaranteed by design at TA = 25°C.
Note 4: PBRST must be held low for a minimum of 20ms to guarantee a reset.
Impala Linear Corporation
(408) 574-3939
ILC1832 1.1
www.impalalinear.com
October 1999
2
IMPALA [ Impala Linear Corporation ]
