IMP811, IMP812
Application Information
RESET Output Operation
In µP/µC systems it is important to have the processor begin
operation from a known state or be able to return the system to a
known state. A RESET output to a processor is provided to pre-
vent improper operation during power supply sequencing or low
voltage – brownout – conditions.
If V drops below the reset threshold, RESET automatically
CC
becomes active. Alternatively, external circuitry or a human oper-
ator can initiate this condition using the Manual Reset (MR) pin.
There is an internal pullup on MR so it can be left open if it is not
used. MR can be driven by TTL/CMOS logic or even an external
switch, since it is already debounced. If the switch is at the end of
a long cable, it might require a bypass (100nF) at the pin if noise
pickup is a problem.
The IMP811/812 are designed to monitor the system power sup-
ply voltages and issue a RESET signal when levels are out of
range. RESET outputs are guaranteed to be active for V above
CC
1.1V. When V exceeds the reset threshold, an internal timer
CC
Six voltage thresholds are available to support 3V and 5V systems:
keeps RESET active for the reset timeout period, after which
RESET becomes inactive (HIGH for the IMP811 and LOW for the
IMP812).
Reset Threshold
Suffix
Voltage (V)
4.63
L
M
J
4.38
4.00
T
S
R
3.08
2.93
2.63
Valid Reset with VCC under 1.1V
Negative VCC Transients
To ensure that logic inputs connected to the IMP811 RESET pin Typically short duration transients of 100mV amplitude and 20µs
are in a known state when VCC is under 1.1V, a 100kΩ pull-down duration do not cause a false RESET. A 0.1µF capacitor at VCC
resistor at RESET is needed. The value is not critical.
increases transient immunity.
A similar pull-up resistor to VCC is needed with the IMP812.
V
V
CC
CC
100kΩ
IMP812
IMP811
Power
Power
Supply
Supply
MR
RESET
MR
RESET
100k
GND
GND
811/12_05.eps
811/12_04.eps
Figure 2. RESET Valid with VCC Under 1.1V
Figure 3. RESET Valid with VCC Under 1.1V
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© 1999 IMP, Inc.
6
IMP [ IMP, INC ]
