IMP809, IMP810
Pin Descriptions
Pin Number
Name
GND
Function
Ground
1
2
RESET
RESET is asserted LOW if VCC falls below the reset threshold and remains LOW for the
240ms typical reset timeout period (140ms minimum) after VCC exceeds the threshold.
(IMP809)
2
RESET
VCC
RESET is asserted HIGH if VCC falls below the reset threshold and remains HIGH for the
240ms typical reset timeout period (140ms minimum) after VCC exceeds the threshold.
(IMP810)
3
Power supply input voltage (3.0V, 3.3V, 5.0V)
Detailed Descriptions
Reset Timing
The reset signal is asserted–LOW for the IMP809 and HIGH for the
IMP810–when the VCC signal falls below the threshold trip voltage
and remains asserted for 140ms minimum after the VCC has risen
above the threshold.
5V
VCC
VTH
Active Reset
Timeout Period
0V
140ms
minimum
5V
RESET
IMP809
IMP810
0V
5V
RESET
0V
809/10_03.eps
Figure 1. Reset Timing Diagram
4
IMP [ IMP, INC ]
